forked from epagris/FreeRTOS-Kernel
Revert the formatting changes on MikroC ports. (#882)
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
This commit is contained in:
Soren Ptak
GitHub
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a8a17dc4b5
commit
2dfc5142f4
@ -345,22 +345,22 @@ BaseType_t xPortStartScheduler( void )
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if( ulImplementedPrioBits == 8 )
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{
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/* When the hardware implements 8 priority bits, there is no way for
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* the software to configure PRIGROUP to not have sub-priorities. As
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* a result, the least significant bit is always used for sub-priority
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* and there are 128 preemption priorities and 2 sub-priorities.
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*
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* This may cause some confusion in some cases - for example, if
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* configMAX_SYSCALL_INTERRUPT_PRIORITY is set to 5, both 5 and 4
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* priority interrupts will be masked in Critical Sections as those
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* are at the same preemption priority. This may appear confusing as
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* 4 is higher (numerically lower) priority than
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* configMAX_SYSCALL_INTERRUPT_PRIORITY and therefore, should not
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* have been masked. Instead, if we set configMAX_SYSCALL_INTERRUPT_PRIORITY
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* to 4, this confusion does not happen and the behaviour remains the same.
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*
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* The following assert ensures that the sub-priority bit in the
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* configMAX_SYSCALL_INTERRUPT_PRIORITY is clear to avoid the above mentioned
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* confusion. */
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* the software to configure PRIGROUP to not have sub-priorities. As
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* a result, the least significant bit is always used for sub-priority
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* and there are 128 preemption priorities and 2 sub-priorities.
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*
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* This may cause some confusion in some cases - for example, if
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* configMAX_SYSCALL_INTERRUPT_PRIORITY is set to 5, both 5 and 4
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* priority interrupts will be masked in Critical Sections as those
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* are at the same preemption priority. This may appear confusing as
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* 4 is higher (numerically lower) priority than
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* configMAX_SYSCALL_INTERRUPT_PRIORITY and therefore, should not
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* have been masked. Instead, if we set configMAX_SYSCALL_INTERRUPT_PRIORITY
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* to 4, this confusion does not happen and the behaviour remains the same.
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*
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* The following assert ensures that the sub-priority bit in the
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* configMAX_SYSCALL_INTERRUPT_PRIORITY is clear to avoid the above mentioned
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* confusion. */
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configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & 0x1U ) == 0U );
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ulMaxPRIGROUPValue = 0;
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}
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@ -27,7 +27,7 @@
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*/
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#ifndef PORTMACRO_H
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#define PORTMACRO_H
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#define PORTMACRO_H
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/* *INDENT-OFF* */
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#ifdef __cplusplus
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@ -48,53 +48,53 @@
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/* The compiler needs to be told functions that are only referenced by pointer
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* are to be included in the build. NOTE: Omitting these lines will result in a
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* run-time crash, not a linker error! */
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#pragma funcall vTaskStartScheduler prvIdleTask
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#pragma funcall xTimerCreateTimerTask prvTimerTask
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#pragma funcall vTaskStartScheduler prvIdleTask
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#pragma funcall xTimerCreateTimerTask prvTimerTask
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/* Type definitions. */
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#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE uint32_t
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#define portBASE_TYPE long
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#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE uint32_t
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#define portBASE_TYPE long
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typedef portSTACK_TYPE StackType_t;
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typedef long BaseType_t;
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typedef unsigned long UBaseType_t;
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typedef portSTACK_TYPE StackType_t;
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typedef long BaseType_t;
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typedef unsigned long UBaseType_t;
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#if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
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typedef uint16_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffff
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#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
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typedef uint32_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
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#if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
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typedef uint16_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffff
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#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
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typedef uint32_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
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/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
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* not need to be guarded with a critical section. */
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#define portTICK_TYPE_IS_ATOMIC 1
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#else
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#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
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#endif
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#define portTICK_TYPE_IS_ATOMIC 1
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#else
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#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
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#endif
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/*-----------------------------------------------------------*/
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/* Architecture specifics. */
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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#define portBYTE_ALIGNMENT 8
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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#define portBYTE_ALIGNMENT 8
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/*-----------------------------------------------------------*/
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/* Scheduler utilities. */
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#define portYIELD() \
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#define portYIELD() \
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{ \
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/* Set a PendSV to request a context switch. */ \
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
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\
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/* Barriers are normally not required but do ensure the code is completely \
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* within the specified behaviour for the architecture. */ \
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__asm { dsb }; \
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__asm { isb }; \
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__asm{ dsb }; \
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__asm{ isb }; \
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}
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#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
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@ -116,91 +116,87 @@ typedef unsigned long UBaseType_t;
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/*-----------------------------------------------------------*/
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/* Critical section management. */
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extern void vPortEnterCritical( void );
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extern void vPortExitCritical( void );
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#define portDISABLE_INTERRUPTS() CPU_REG_SET( CPU_BASEPRI, configMAX_SYSCALL_INTERRUPT_PRIORITY ); __asm { dsb }; __asm { isb }
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#define portENABLE_INTERRUPTS() CPU_REG_SET( CPU_BASEPRI, 0 );
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#define portENTER_CRITICAL() vPortEnterCritical()
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#define portEXIT_CRITICAL() vPortExitCritical()
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#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) CPU_REG_SET( CPU_BASEPRI, x ); /* Barrier instructions not used as this is only used to lower the basepri. */
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extern void vPortEnterCritical( void );
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extern void vPortExitCritical( void );
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#define portDISABLE_INTERRUPTS() CPU_REG_SET( CPU_BASEPRI, configMAX_SYSCALL_INTERRUPT_PRIORITY ); __asm{ dsb }; __asm{ isb }
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#define portENABLE_INTERRUPTS() CPU_REG_SET( CPU_BASEPRI, 0 );
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#define portENTER_CRITICAL() vPortEnterCritical()
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#define portEXIT_CRITICAL() vPortExitCritical()
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#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) CPU_REG_SET( CPU_BASEPRI, x ); /* Barrier instructions not used as this is only used to lower the basepri. */
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/*-----------------------------------------------------------*/
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/* Task function macros as described on the FreeRTOS.org WEB site. These are
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* not necessary for to use this port. They are defined so the common demo files
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* (which build with all the ports) will build. */
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
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/*-----------------------------------------------------------*/
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/* Tickless idle/low power functionality. */
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#ifndef portSUPPRESS_TICKS_AND_SLEEP
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extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
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#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
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#endif
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#ifndef portSUPPRESS_TICKS_AND_SLEEP
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extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
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#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
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#endif
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/*-----------------------------------------------------------*/
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/* Architecture specific optimisations. */
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#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
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#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
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#endif
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#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
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/* Generic helper function. */
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__attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
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{
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uint8_t ucReturn;
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__asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) );
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return ucReturn;
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}
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/* Check the configuration. */
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#if ( configMAX_PRIORITIES > 32 )
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#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
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#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
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#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
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#endif
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#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
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/* Generic helper function. */
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__attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
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{
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uint8_t ucReturn;
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__asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) );
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return ucReturn;
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}
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/* Check the configuration. */
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#if ( configMAX_PRIORITIES > 32 )
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#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
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#endif
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/* Store/clear the ready priorities in a bit map. */
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#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
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#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
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#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
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#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
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/*-----------------------------------------------------------*/
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#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
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#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
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#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
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#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
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/*-----------------------------------------------------------*/
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#ifdef configASSERT
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void vPortValidateInterruptPriority( void );
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#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()
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#endif
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#ifdef configASSERT
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void vPortValidateInterruptPriority( void );
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#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()
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#endif
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/* portNOP() is not required by this port. */
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#define portNOP()
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#define portNOP()
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BaseType_t xPortIsInsideInterrupt( void );
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BaseType_t xPortIsInsideInterrupt( void );
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/*-----------------------------------------------------------*/
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static inline uint32_t ulPortRaiseBASEPRI( void )
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{
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uint32_t ulOriginalBASEPRI;
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static inline uint32_t ulPortRaiseBASEPRI( void )
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{
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uint32_t ulOriginalBASEPRI;
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ulOriginalBASEPRI = CPU_REG_GET( CPU_BASEPRI );
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CPU_REG_SET( CPU_BASEPRI, configMAX_SYSCALL_INTERRUPT_PRIORITY );
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__asm {
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dsb
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};
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__asm {
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isb
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};
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return ulOriginalBASEPRI;
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}
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ulOriginalBASEPRI = CPU_REG_GET( CPU_BASEPRI );
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CPU_REG_SET( CPU_BASEPRI, configMAX_SYSCALL_INTERRUPT_PRIORITY );
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__asm{ dsb };
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__asm{ isb };
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return ulOriginalBASEPRI;
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}
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/*-----------------------------------------------------------*/
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/* *INDENT-OFF* */
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