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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-11-04 02:59:01 +01:00
modernize ARM assembler syntax (#1148)
modernize ARM assembler syntax Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
This commit is contained in:
Florian La Roche
GitHub
parent
61440fc664
commit
9788e7e46a
@ -228,8 +228,8 @@ static void prvTaskExitError( void )
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void vPortSVCHandler( void )
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{
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__asm volatile (
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" ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */
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" ldr r1, [r3] \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
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" ldr r3, =pxCurrentTCB \n" /* Restore the context. */
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" ldr r1, [r3] \n" /* Get the pxCurrentTCB address. */
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" ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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" ldmia r0!, {r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
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" msr psp, r0 \n" /* Restore the task stack pointer. */
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@ -239,8 +239,7 @@ void vPortSVCHandler( void )
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" orr r14, #0xd \n"
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" bx r14 \n"
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" \n"
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" .align 4 \n"
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"pxCurrentTCBConst2: .word pxCurrentTCB \n"
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" .ltorg \n"
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);
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}
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/*-----------------------------------------------------------*/
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@ -462,7 +461,7 @@ void xPortPendSVHandler( void )
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" mrs r0, psp \n"
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" isb \n"
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" \n"
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" ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
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" ldr r3, =pxCurrentTCB \n" /* Get the location of the current TCB. */
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" ldr r2, [r3] \n"
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" \n"
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" stmdb r0!, {r4-r11} \n" /* Save the remaining registers. */
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@ -483,8 +482,7 @@ void xPortPendSVHandler( void )
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" isb \n"
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" bx r14 \n"
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" \n"
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" .align 4 \n"
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"pxCurrentTCBConst: .word pxCurrentTCB \n"
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" .ltorg \n"
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::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
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);
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}
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@ -695,7 +695,7 @@ static void prvRestoreContextOfFirstTask( void )
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" msr msp, r0 \n" /* Set the msp back to the start of the stack. */
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" \n"
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/*------------ Program MPU. ------------ */
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" ldr r3, pxCurrentTCBConst2 \n" /* r3 = pxCurrentTCBConst2. */
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" ldr r3, =pxCurrentTCB \n" /* r3 = =pxCurrentTCB. */
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" ldr r2, [r3] \n" /* r2 = pxCurrentTCB. */
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" add r2, r2, #4 \n" /* r2 = Second item in the TCB which is xMPUSettings. */
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" \n"
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@ -716,7 +716,7 @@ static void prvRestoreContextOfFirstTask( void )
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" dsb \n" /* Force memory writes before continuing. */
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" \n"
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/*---------- Restore Context. ---------- */
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" ldr r3, pxCurrentTCBConst2 \n" /* r3 = pxCurrentTCBConst2. */
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" ldr r3, =pxCurrentTCB \n" /* r3 = =pxCurrentTCB. */
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" ldr r2, [r3] \n" /* r2 = pxCurrentTCB. */
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" ldr r1, [r2] \n" /* r1 = Location of saved context in TCB. */
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" \n"
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@ -732,8 +732,6 @@ static void prvRestoreContextOfFirstTask( void )
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" bx lr \n"
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" \n"
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" .ltorg \n" /* Assemble current literal pool to avoid offset-out-of-bound errors with lto. */
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" .align 4 \n"
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"pxCurrentTCBConst2: .word pxCurrentTCB \n"
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);
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}
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/*-----------------------------------------------------------*/
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@ -988,7 +986,7 @@ void xPortPendSVHandler( void )
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__asm volatile
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(
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" ldr r3, pxCurrentTCBConst \n" /* r3 = pxCurrentTCBConst. */
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" ldr r3, =pxCurrentTCB \n" /* r3 = =pxCurrentTCB. */
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" ldr r2, [r3] \n" /* r2 = pxCurrentTCB. */
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" ldr r1, [r2] \n" /* r1 = Location where the context should be saved. */
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" \n"
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@ -1012,7 +1010,7 @@ void xPortPendSVHandler( void )
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" msr basepri, r0 \n"
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" \n"
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/*------------ Program MPU. ------------ */
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" ldr r3, pxCurrentTCBConst \n" /* r3 = pxCurrentTCBConst. */
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" ldr r3, =pxCurrentTCB \n" /* r3 = =pxCurrentTCB. */
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" ldr r2, [r3] \n" /* r2 = pxCurrentTCB. */
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" add r2, r2, #4 \n" /* r2 = Second item in the TCB which is xMPUSettings. */
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" \n"
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@ -1033,7 +1031,7 @@ void xPortPendSVHandler( void )
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" dsb \n" /* Force memory writes before continuing. */
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" \n"
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/*---------- Restore Context. ---------- */
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" ldr r3, pxCurrentTCBConst \n" /* r3 = pxCurrentTCBConst. */
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" ldr r3, =pxCurrentTCB \n" /* r3 = =pxCurrentTCB. */
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" ldr r2, [r3] \n" /* r2 = pxCurrentTCB. */
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" ldr r1, [r2] \n" /* r1 = Location of saved context in TCB. */
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" \n"
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@ -1047,8 +1045,6 @@ void xPortPendSVHandler( void )
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" bx lr \n"
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" \n"
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" .ltorg \n" /* Assemble current literal pool to avoid offset-out-of-bound errors with lto. */
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" .align 4 \n"
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"pxCurrentTCBConst: .word pxCurrentTCB \n"
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::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
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);
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}
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@ -1207,8 +1203,6 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
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" movne r0, #0 \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
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" moveq r0, #1 \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
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" bx lr \n" /* Return. */
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" \n"
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" .align 4 \n"
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::: "r0", "memory"
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);
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}
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@ -260,8 +260,8 @@ static void prvTaskExitError( void )
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void vPortSVCHandler( void )
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{
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__asm volatile (
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" ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */
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" ldr r1, [r3] \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
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" ldr r3, =pxCurrentTCB \n" /* Restore the context. */
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" ldr r1, [r3] \n" /* Get the pxCurrentTCB address. */
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" ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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" ldmia r0!, {r4-r11, r14} \n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
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" msr psp, r0 \n" /* Restore the task stack pointer. */
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@ -270,8 +270,7 @@ void vPortSVCHandler( void )
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" msr basepri, r0 \n"
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" bx r14 \n"
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" \n"
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" .align 4 \n"
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"pxCurrentTCBConst2: .word pxCurrentTCB \n"
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" .ltorg \n"
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);
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}
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/*-----------------------------------------------------------*/
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@ -511,7 +510,7 @@ void xPortPendSVHandler( void )
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" mrs r0, psp \n"
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" isb \n"
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" \n"
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" ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
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" ldr r3, =pxCurrentTCB \n" /* Get the location of the current TCB. */
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" ldr r2, [r3] \n"
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" \n"
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" tst r14, #0x10 \n" /* Is the task using the FPU context? If so, push high vfp registers. */
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@ -552,8 +551,7 @@ void xPortPendSVHandler( void )
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" \n"
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" bx r14 \n"
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" \n"
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" .align 4 \n"
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"pxCurrentTCBConst: .word pxCurrentTCB \n"
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" .ltorg \n"
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::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
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);
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}
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@ -761,7 +761,7 @@ static void prvRestoreContextOfFirstTask( void )
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" msr msp, r0 \n" /* Set the msp back to the start of the stack. */
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" \n"
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/*------------ Program MPU. ------------ */
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" ldr r3, pxCurrentTCBConst2 \n" /* r3 = pxCurrentTCBConst2. */
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" ldr r3, =pxCurrentTCB \n" /* r3 = =pxCurrentTCB. */
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" ldr r2, [r3] \n" /* r2 = pxCurrentTCB. */
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" add r2, r2, #4 \n" /* r2 = Second item in the TCB which is xMPUSettings. */
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" \n"
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@ -789,7 +789,7 @@ static void prvRestoreContextOfFirstTask( void )
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" dsb \n" /* Force memory writes before continuing. */
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" \n"
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/*---------- Restore Context. ---------- */
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" ldr r3, pxCurrentTCBConst2 \n" /* r3 = pxCurrentTCBConst2. */
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" ldr r3, =pxCurrentTCB \n" /* r3 = =pxCurrentTCB. */
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" ldr r2, [r3] \n" /* r2 = pxCurrentTCB. */
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" ldr r1, [r2] \n" /* r1 = Location of saved context in TCB. */
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" \n"
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@ -805,8 +805,6 @@ static void prvRestoreContextOfFirstTask( void )
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" bx lr \n"
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" \n"
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" .ltorg \n" /* Assemble current literal pool to avoid offset-out-of-bound errors with lto. */
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" .align 4 \n"
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" pxCurrentTCBConst2: .word pxCurrentTCB\n"
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);
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}
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/*-----------------------------------------------------------*/
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@ -1084,7 +1082,7 @@ void xPortPendSVHandler( void )
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__asm volatile
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(
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" ldr r3, pxCurrentTCBConst \n" /* r3 = pxCurrentTCBConst. */
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" ldr r3, =pxCurrentTCB \n" /* r3 = =pxCurrentTCB. */
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" ldr r2, [r3] \n" /* r2 = pxCurrentTCB. */
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" ldr r1, [r2] \n" /* r1 = Location where the context should be saved. */
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" \n"
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@ -1122,7 +1120,7 @@ void xPortPendSVHandler( void )
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" msr basepri, r0 \n"
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" \n"
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/*------------ Program MPU. ------------ */
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" ldr r3, pxCurrentTCBConst \n" /* r3 = pxCurrentTCBConst. */
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" ldr r3, =pxCurrentTCB \n" /* r3 = =pxCurrentTCB. */
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" ldr r2, [r3] \n" /* r2 = pxCurrentTCB. */
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" add r2, r2, #4 \n" /* r2 = Second item in the TCB which is xMPUSettings. */
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" \n"
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@ -1150,7 +1148,7 @@ void xPortPendSVHandler( void )
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" dsb \n" /* Force memory writes before continuing. */
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" \n"
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/*---------- Restore Context. ---------- */
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" ldr r3, pxCurrentTCBConst \n" /* r3 = pxCurrentTCBConst. */
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" ldr r3, =pxCurrentTCB \n" /* r3 = =pxCurrentTCB. */
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" ldr r2, [r3] \n" /* r2 = pxCurrentTCB. */
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" ldr r1, [r2] \n" /* r1 = Location of saved context in TCB. */
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" \n"
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@ -1170,8 +1168,6 @@ void xPortPendSVHandler( void )
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" bx lr \n"
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" \n"
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" .ltorg \n" /* Assemble the current literal pool to avoid offset-out-of-bound errors with lto. */
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" .align 4 \n"
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" pxCurrentTCBConst: .word pxCurrentTCB \n"
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::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
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);
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}
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@ -1349,8 +1345,6 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
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" movne r0, #0 \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
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" moveq r0, #1 \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
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" bx lr \n" /* Return. */
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" \n"
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" .align 4 \n"
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::: "r0", "memory"
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);
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}
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@ -254,8 +254,8 @@ static void prvTaskExitError( void )
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void vPortSVCHandler( void )
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{
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__asm volatile (
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" ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */
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" ldr r1, [r3] \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
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" ldr r3, =pxCurrentTCB \n" /* Restore the context. */
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" ldr r1, [r3] \n" /* Get the pxCurrentTCB address. */
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" ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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" ldmia r0!, {r4-r11, r14} \n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
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" msr psp, r0 \n" /* Restore the task stack pointer. */
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@ -264,8 +264,7 @@ void vPortSVCHandler( void )
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" msr basepri, r0 \n"
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" bx r14 \n"
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" \n"
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" .align 4 \n"
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"pxCurrentTCBConst2: .word pxCurrentTCB \n"
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" .ltorg \n"
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);
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}
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/*-----------------------------------------------------------*/
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@ -499,7 +498,7 @@ void xPortPendSVHandler( void )
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" mrs r0, psp \n"
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" isb \n"
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" \n"
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" ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
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" ldr r3, =pxCurrentTCB \n" /* Get the location of the current TCB. */
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" ldr r2, [r3] \n"
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" \n"
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" tst r14, #0x10 \n" /* Is the task using the FPU context? If so, push high vfp registers. */
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@ -542,8 +541,7 @@ void xPortPendSVHandler( void )
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" \n"
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" bx r14 \n"
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" \n"
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" .align 4 \n"
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"pxCurrentTCBConst: .word pxCurrentTCB \n"
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" .ltorg \n"
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::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
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);
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}
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