5 Commits

Author	SHA1	Message	Date
Richard Barry	7d6758ee1a	Minor updates and change version number for V7.5.0 release.	2013-07-17 18:32:57 +00:00
Richard Barry	ad8fa53043	Kernel optimisations.	2013-07-12 11:11:19 +00:00
Richard Barry	65704174c9	Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the RX ports that use the Renesas compiler. ... Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the Cortex-A9 ports.	2013-07-09 17:57:59 +00:00
Richard Barry	0f6b0d3a59	Enhance heap_4.c to prevent blocks accidentally being freed twice, or blocks that don't have a valid block link descriptor being freed. ... Update the Cortex-A9 port to include asserts if an ISR safe FreeRTOS function is called from an interrupt that has a higher logical priority than configMAX_SYSCALL_INTERRUPT_PRIORITY (or whatever the CA9 equivalent is called), and also assert if the binary point is not set correctly.	2013-07-09 12:49:49 +00:00
Richard Barry	04dafed839	IAR ARM Cortex-A port layer.	2013-06-20 12:20:40 +00:00