Commit Graph

  • 96e72413f7 Kernel code: + Added mtCOVERAGE_TEST_DELAY() macro to facilitate getting better code coverage during testing. + Update prvNotifyQueueSetContainer() so it does not call xTaskRemoveFromEventList() if it is called from an interrupt, and the queue is locked. Richard Barry 2015-03-04 17:45:18 +00:00
  • 7d169cef52 Correct typeo that broke the Win32 port. Richard Barry 2015-02-17 14:28:10 +00:00
  • 86b09bfeb9 Kernel updates: + Added vTimerSetTimerID() to compliment vTimerGetTimerID(). Now the timer ID can be used as timer local storage. + Updated comments and added some additional assert() calls. Richard Barry 2015-02-11 15:41:30 +00:00
  • dfdc319518 Kernel updates: - Add user configurable thread local storage array, with get/set access function. Richard Barry 2015-01-26 17:40:35 +00:00
  • 51aa373c4c Add run-time stats to the Kintex7 Microblaze demo. Richard Barry 2015-01-19 13:34:26 +00:00
  • e7054e934f V8.2.0 Richard Barry 2015-01-17 09:38:00 +00:00
  • acfbb7dd14 Add the beginnings of a Microblaze project for the KC705. Richard Barry 2015-01-16 19:16:12 +00:00
  • 501a531d46 Update version number in preparation for official V8.2.0 release. Richard Barry 2015-01-16 13:20:28 +00:00
  • c37b2ca39b Demo app changes: Add a "query heap" command to the standard sample CLI commands. Remove casting from configMAX_PRIORITIES setting in Win32 simulator demos as it was preventing a clean build. Richard Barry 2015-01-15 21:37:32 +00:00
  • e4e6328300 Remove casting from configMAX_PRIORITIES setting in FAT SL / CLI demo as it was preventing a clean build. Richard Barry 2015-01-07 07:02:17 +00:00
  • 966ab50b68 Tag first release candidate for V8.2.0. V8.2.0rc1 V8.2.0-rc1 Richard Barry 2014-12-24 10:46:38 +00:00
  • 271393b7d9 Release candidate - this will be tagged as FreeRTOS V8.2.0rc1 and a zip file provided. Minor lint changes. Richard Barry 2014-12-24 09:40:58 +00:00
  • 5dd77c7aeb Rename SAM4E demo directory to include the 'F' in 'M4F' - minor point for the sake of consistency. Richard Barry 2014-12-24 08:55:14 +00:00
  • 6741592026 Update version numbers in preparation for V8.2.0 release candidate 1. Richard Barry 2014-12-21 19:09:18 +00:00
  • fd02010886 Kernel changes: + Made xTaskNotifyGiveFromISR() its own function, rather than a macro that calls xTaskNotifyFromISR() (minor performance improvement). + GCC and Keil Cortex-M4F ports now use vPortRaiseBASEPRI() in place of ulPortRaiseBASEPRI() where the return value is not required (minor performance improvement). Richard Barry 2014-12-21 10:26:36 +00:00
  • 2de32c0141 Kernel changes: + Do not attempt to free the stack of a deleted task if the stack was statically allocated. + Introduce configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES - which optionally writes known values into the list and list item data structures in order to assist with the detection of memory corruptions. Richard Barry 2014-12-19 16:27:56 +00:00
  • f407b70dcc + Update demos that use FreeRTOS+Trace to work with the latest trace recorder library. + Fix a few compiler warnings. + Add TickType_t specific critical sections so critical sections are not used when accessing the tick count in cases where the access is atomic (32-bit tick count, 32-bit architecture). Richard Barry 2014-12-18 11:02:15 +00:00
  • 85fb1cc024 + New feature added: Task notifications. + Optimise Cortex-M4F ports by inlining some critical section macros. + Original ports used a #define to set the path to portmacro.h - that method has been obsolete for years and now all the old definitions have been moved into a separate header files called deprecated_definitions.h. + Cortex-M port now check the active vector bits against 0xff when determining if a function is called from an interrupt - previously only a subset of the bits (0x1f) were checked. + Add in new standard demo/test files TaskNotify.c/h and include the files in the simulator demos. + Update trace recorder code, and some demos to use the new version (more to do). + Introduce uxTaskPriorityGetFromISR(). + Minor typo corrections. + Update MingW simulator demo to match the MSVC simulator demo. Richard Barry 2014-12-15 14:13:03 +00:00
  • ca22607d14 Core kernel code: Richard Barry 2014-10-15 21:01:31 +00:00
  • e3263bb9b3 Demo projects only: + Remove some #warnings messages from the Cycle 5 - which were left in the code as reminders of tests that were not yet completed but are now. Richard Barry 2014-10-09 15:42:43 +00:00
  • 9e66637bec Core kernel files: Richard Barry 2014-10-08 20:31:14 +00:00
  • ee541a347d MSP430 Demo projects only: Update project format to new IAR version. Richard Barry 2014-10-05 20:43:12 +00:00
  • e0d9a274e2 Demo project only: Added comprehensive demo including FreeRTOS+CLI to the Cyclone V SoC project. Richard Barry 2014-10-01 17:28:42 +00:00
  • d269f2027a Demo project only: Cyclone V SoC now running from external RAM. Richard Barry 2014-10-01 09:30:35 +00:00
  • e2f2cfa816 Added project for Altera Cyclone V SoC, currently running from internal RAM. Richard Barry 2014-09-30 15:32:19 +00:00
  • 3b0854bf96 Core kernel code: + Introduce xSemaphoreGenericGiveFromISR() as an optimisation when giving semaphores and mutexes from an interrupt. Richard Barry 2014-09-16 14:54:32 +00:00
  • b3c040fc27 SAM4L tickless implementation: Bug fix and update the demo project to exercise the fix. Richard Barry 2014-09-16 12:24:14 +00:00
  • 4f03f7d1bb Demo project only: Add the new IntSem test/demo code into the MSVC demo project. Richard Barry 2014-09-12 11:32:47 +00:00
  • b6e4854f26 Demo tasks only, with the aim of improving test coverage: + Split out the code that uses a mutex from an interrupt from GenQTest.c and add to new common demo task IntSemTest.c. Richard Barry 2014-09-11 12:06:27 +00:00
  • ad2ad3da28 V8.1.2 Richard Barry 2014-09-03 08:10:11 +00:00
  • d55e7e77a2 Update version number to 8.1.2 after moving the defaulting of configUSE_PORT_OPTIMISED_TASK_SELECTION into individual port layers so it does not affect ports that do not support the definition. Richard Barry 2014-09-02 22:39:54 +00:00
  • 33cc3a292b Demo code only: Add the IntQ standard test to the SAM4S project. Richard Barry 2014-09-02 16:06:57 +00:00
  • dce4495d93 V8.1.1 Richard Barry 2014-08-30 20:28:08 +00:00
  • 99229b597b Correct potential compiler warning when configUSE_MUTEXES is set to 0. Add comments. Richard Barry 2014-08-30 20:18:18 +00:00
  • e7b4667f19 Richard Barry 2014-08-29 19:26:40 +00:00
  • a60ce58731 Update version number to 8.1.1 for patch release that re-enables mutexes to be given from an interrupt. Richard Barry 2014-08-29 19:14:23 +00:00
  • ff5d3512b3 Core kernel code: - Re-introduce the ability to give a mutex from an ISR. Richard Barry 2014-08-29 13:53:58 +00:00
  • ce94839ce3 V8.1.0 Richard Barry 2014-08-26 16:56:28 +00:00
  • 6507701fdf Lower the minimum stack size used by the ATSAMA5 demo. Richard Barry 2014-08-26 16:53:40 +00:00
  • 7d49c2190c Minor edits prior to tagging V8.1.0. Richard Barry 2014-08-26 16:23:09 +00:00
  • d33a14b5fb ***IMMINENT RELEASE NOTICE*** Update version numbers ready for FreeRTOS V8.1.0 release in about 10 days. Richard Barry 2014-08-16 20:19:40 +00:00
  • e491610725 Remove some irrelevant CyaSSL files. Richard Barry 2014-08-16 15:43:43 +00:00
  • 52e687086c Demo application related: + Update the RZ IAR project so it targets the RZ RSK rather than custom hardware. + Update the RZ ARM/DS-5 project so it targets the RZ RSK rather than custom hardware. + Updated RX64M demos to use the new iodefine.h naming. Richard Barry 2014-08-16 14:29:39 +00:00
  • 162448f06b General maintenance - changing comments and correcting spellings only. Richard Barry 2014-08-04 07:57:18 +00:00
  • 60538c7480 Common demo tasks: - Add additional tests to GenQTest.c to test the updated priority inheritance mechanism. - Slightly increase some delays in recmutex.c to prevent it reporting false errors in high load test cases. Richard Barry 2014-08-04 07:53:20 +00:00
  • 47f895cb34 Cortex-A5 IAR port: - Removed SAMA5 specifics from the port layer, and instead call a generic ISR callback as per Cortex-A9 ports. Richard Barry 2014-08-03 19:15:30 +00:00
  • b2e739495a Cortex-A5 IAR port baseline prior to removing all SAMA5 specifics to make it generic.: - Slight improvement to the save context macro. - Remove some #warning remarks. - Enable interrupts before calling the ISR handler rather than in the ISR handler. Richard Barry 2014-08-03 18:37:58 +00:00
  • 3a3d061cc5 Continue working on the GIC-less Cortex-A5 port for IAR: - Add in the assert when a task attempts to exit its implementing function without deleting itself. - Remove obsolete code from the context switch asm code (obsoleted by the fact that there is no mask register). - Attempt to make code more generic by using definitions for additional register addresses. Richard Barry 2014-07-29 21:31:04 +00:00
  • e9b5deb34a Carry on working on SAMA5D3 demo: - Add full interrupt nesting tests. - Add additional critical section/context switching tests. - Set interrupt priorities so everything can run at once without any software watchdog errors. - Re-enable interrupts in each IRQ handler. - Add in run-time stats. Richard Barry 2014-07-29 21:28:22 +00:00
  • 146b46df87 SAMA5D3 demo: Add CDC driver code and use CDC to create a simple command console. Richard Barry 2014-07-23 21:07:03 +00:00
  • 3d007d0b4b Update CyaSSL to latest version. Richard Barry 2014-07-18 18:54:25 +00:00
  • 5fcd270398 Re-test Zynq demo now it is using the latest tools. Richard Barry 2014-07-14 14:01:07 +00:00
  • bd9d37924d Add back Zynq demo - this time using SDK V14.2. Richard Barry 2014-07-14 13:00:18 +00:00
  • 96ceb9f537 Remove Zynq demo project ready to recreate the project using the 14.2 version of Xilinx's SDK. Richard Barry 2014-07-14 11:46:34 +00:00
  • 5b96cf6eea Add 'full' demo to the SAMA5 Xplained demo - but so far without interrupt nesting tests or CLI. Richard Barry 2014-07-12 20:40:33 +00:00
  • 8ad9b75810 Rename ARM_CAx_No_GIC ARM_CA5_No_GIC and add FreeRTOSConfig setting to specify the number of registers in the FPU unit. Richard Barry 2014-07-12 20:39:22 +00:00
  • 29336e35b5 SAMA5D3 Xplained demo blinky running. Richard Barry 2014-07-12 19:25:18 +00:00
  • f4a1a7d577 Add new port layer for Cortex-A devices without the means to mask interrupt priorities. Richard Barry 2014-07-12 19:21:04 +00:00
  • 5b96c12e92 Start of SAMA5D3 XPlained demo. Richard Barry 2014-07-09 21:19:01 +00:00
  • 8aa5fa3459 Make the parameters to vPortDefineHeapRegions() const. Add additional asserts to the Keil CM3 and CM4F ports (other CM3/4 ports already updated). Add the additional yield necessitated by the mutex held count to the case when configUSE_QUEUE_SETS is 0. Richard Barry 2014-07-04 13:17:21 +00:00
  • 4fe2abc792 Update the MSVC simulator demo to demonstrate heap_5 allocator and pdTICKS_TO_MS macro being used. Richard Barry 2014-07-03 16:49:29 +00:00
  • d96dc2adb0 Simply some of the alignment calculations in heap_4.c to match those used in heap_5.c. Remove some apparently obsolete code from xTaskPriorityDisinherit() (a task cannot be both blocked and giving bac a mutex at the same time]. Update the new "mutex held count" increment and decrement functions to allow mutexes to be created before the scheduler is started. Richard Barry 2014-07-03 14:44:37 +00:00
  • b0ba273489 Check in the portable.h version required to use heap_5.c. Richard Barry 2014-07-02 10:20:35 +00:00
  • 4b26dc0614 Check in the new memory allocator that allows the heap to span multiple blocks. Richard Barry 2014-07-02 10:19:49 +00:00
  • 5e47df8c01 Update FreeRTOS+ components and demos to use typedef names introduced in FreeRTOS V8. Richard Barry 2014-06-20 20:15:20 +00:00
  • 4ce4de750a Update timer demo in PIC32MZ demo to remove multiple extern definition created by adding in the macro that checks non ISR safe functions are not called from ISRs. Richard Barry 2014-06-16 13:07:01 +00:00
  • 42b1688a30 Implementation of mutex held counting in tasks.c - needs optimisation before release. Richard Barry 2014-06-16 12:55:50 +00:00
  • 583b144bc3 Default the definition of portASSERT_IF_IN_ISR() to nothing if it is not defined. Helper updates to allow a count of the number of mutexes held to be added. Updates to the CCS Cortex-R4 implementation necessitated by a change in compiler semantics. Update PIC32MX and MZ ports to assert if a non ISR safe function is called from an ISR. Richard Barry 2014-06-16 12:51:35 +00:00
  • b4659d8872 Add code to assert() if non ISR safe API function is called from ISR in Tasking CM4F ports - plus fix bug where the max syscall interrupt priority was used incorrectly in the Tasking CM4F port. Richard Barry 2014-06-15 09:24:08 +00:00
  • 113220628f Add code to assert() if non ISR safe API function is called from ISR in IAR and GCC CM3 and CM4F ports - Keil and tasking to follow. Richard Barry 2014-06-14 13:56:25 +00:00
  • 4723209074 Simplify the assert that checks if a non-ISR safe function is called from an ISR in the GCC Cortex-A9 port. Richard Barry 2014-06-13 14:08:28 +00:00
  • d45f18cc8d Add additional comments to the Zynq lwIP demo. Richard Barry 2014-06-13 14:06:43 +00:00
  • 8426eba8e7 Added portASSERT_IF_IN_INTERRUPT() macro to the GCC Cortex A9 port layer. Richard Barry 2014-06-12 16:28:56 +00:00
  • de7df3cfda Zynq demo: Fix Xilinx network driver by deferring the function that allocated memory from the interrupt into a task. Add DHCP option. Richard Barry 2014-06-12 16:27:35 +00:00
  • f1a0534a56 Remove some of the lwip asserts to allow use with 64-bit alignment. Richard Barry 2014-06-10 16:29:32 +00:00
  • 7fa64efeeb Switch to using the private watchdog as the run time stats timer in the Zynq demo. Richard Barry 2014-06-10 16:25:46 +00:00
  • 2f6cb8a86c Reorganise Zynq project after spitting lwIP example into a separate configuration. Richard Barry 2014-06-09 20:20:23 +00:00
  • e92795bcc8 Move the Zynq's lwIP example from the Full demo into its own configuration as having the lwIP tasks at a high priority made the self checking test tasks report failures, while having the lwIP tasks at a low priority slugged the throughput. Richard Barry 2014-06-09 19:35:08 +00:00
  • be8b0ed21d Update lwIP byte alignment to make Zynq pings more reliable. Richard Barry 2014-06-09 12:43:18 +00:00
  • 16ff69e873 Update RL78 GCC demo application after testing with fixed compiler. Richard Barry 2014-06-05 12:44:38 +00:00
  • 9efb5c8b2f Check in RL78 GCC port layer now it has been verified with the fixed compiler. Richard Barry 2014-06-05 12:42:49 +00:00
  • 5cbab67186 Complete RX64M GCC demo. Richard Barry 2014-06-04 09:19:16 +00:00
  • 1130a53ec8 Reverse order of projdefs.h and FreeRTOSConfig.h includes in FreeRTOS.h to allow addition of pdMS_TO_TICKS() macro. Update RXv2 GCC port to match RXv2 Renesas port. Richard Barry 2014-06-04 09:17:14 +00:00
  • 5cd0b1e5ef Add -nomessage command line option to RX64M demo to suppress warning about the yield function being defined when it is not called directly. Richard Barry 2014-05-29 13:56:16 +00:00
  • f46070dc79 Ensure demo app files are using FreeRTOS V8 names - a few were missed previously. Richard Barry 2014-05-29 13:54:15 +00:00
  • ef254df85f A few additional casts to keep the Renesas RX compiler happy. Richard Barry 2014-05-29 13:39:48 +00:00
  • 74ffdb0b89 Add lwIP driver into Zynq demo - not yet fully functional. Richard Barry 2014-05-23 16:38:18 +00:00
  • 09a89763ee Add brackets in lwIP assert statement to prevent compiler warnings. Richard Barry 2014-05-23 16:36:49 +00:00
  • b215310e63 Add some missing volatiles to __asm statements in the CA9 GCC port. Richard Barry 2014-05-19 13:14:02 +00:00
  • f8b3f6fa16 Richard Barry 2014-05-02 12:10:27 +00:00
  • 0bb794301a Update version number ready for release. Richard Barry 2014-04-24 14:26:36 +00:00
  • 911e82a909 Add xQueueGetMutexHolder() to MPU functions. Richard Barry 2014-04-24 12:29:40 +00:00
  • f25503977e Event Groups: Convert the 'clear bits from ISR' function into a pended function to fix reentrancy issue. Event Groups: Ensure the 'wait bits' and 'sync' functions don't return values that still contain some internal control bits. Richard Barry 2014-04-23 15:23:54 +00:00
  • fa7222ab4a Update demos that use FreeRTOS+FAT SL to have correct version numbers after the update of FreeRTOS+FAT SL itself. Richard Barry 2014-04-23 14:34:49 +00:00
  • 03c95b5950 Update IAR XMC4200 project to fix link error that resulted from updating the IAR version to 7.x. Richard Barry 2014-04-23 13:59:56 +00:00
  • a46f251d11 Update FreeRTOS+FAT SL to version 1.0.1. Richard Barry 2014-04-23 13:28:21 +00:00
  • 6af9b013eb Ensure xNewLib_reent is reclaimed when a task is deleted. Richard Barry 2014-04-09 09:07:19 +00:00
  • 82207ebffa Add test and correct code for the unusual case of a task using an event group to synchronise only with itself. Add critical sections around call to prvResetNextTaskUnblockTime() that can occur from within a task. Richard Barry 2014-03-31 02:12:17 +00:00
  • ef7f3c5320 Add the pcTimerGetTimerName() API function. Richard Barry 2014-03-28 14:41:15 +00:00
  • 887fcd04f4 Add interrupt nesting test code into RX64M demo. Richard Barry 2014-03-28 13:05:29 +00:00