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The TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits define the memory type, and where necessary the cacheable and shareable properties of the memory region. The default values for these bits, as configured in our MPU ports, are sometimes not suitable for application. One such example is when the MCU has a cache, the application writer may not want to mark the memory as shareable to avoid disabling the cache. This change allows the application writer to override default vales for TEX, S C and B bits for Flash and RAM in their FreeRTOSConfig.h. The following two new configurations are introduced: - configTEX_S_C_B_FLASH - configTEX_S_C_B_SRAM If undefined, the default values for the above configurations are TEX=000, S=1, C=1, B=1. This ensures backward compatibility. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Each real time kernel port consists of three files that contain the core kernel components and are common to every port, and one or more files that are specific to a particular microcontroller and/or compiler. + The FreeRTOS/Source/Portable/MemMang directory contains the five sample memory allocators as described on the http://www.FreeRTOS.org WEB site. + The other directories each contain files specific to a particular microcontroller or compiler, where the directory name denotes the compiler specific files the directory contains. For example, if you are interested in the [compiler] port for the [architecture] microcontroller, then the port specific files are contained in FreeRTOS/Source/Portable/[compiler]/[architecture] directory. If this is the only port you are interested in then all the other directories can be ignored.