mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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174 lines
5.5 KiB
Plaintext
174 lines
5.5 KiB
Plaintext
;-----------------------------------------------------------------------------
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; This file contains the startup code used by the ICCARM C compiler.
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;
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; The modules in this file are included in the libraries, and may be replaced
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; by any user-defined modules that define the PUBLIC symbol _program_start or
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; a user defined start symbol.
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; To override the cstartup defined in the library, simply add your modified
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; version to the workbench project.
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;
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; All code in the modules (except ?RESET) will be placed in the ICODE segment.
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;
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; $Revision: 1.56 $
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;
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;-----------------------------------------------------------------------------
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;
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; Naming covention of labels in this file:
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;
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; ?xxx - External labels only accessed from assembler.
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; __xxx - External labels accessed from or defined in C.
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; xxx - Labels local to one module (note: this file contains
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; several modules).
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; main - The starting point of the user program.
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;
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;---------------------------------------------------------------
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; Macros and definitions for the whole file
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;---------------------------------------------------------------
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; Mode, correspords to bits 0-5 in CPSR
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MODE_BITS DEFINE 0x1F ; Bit mask for mode bits in CPSR
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USR_MODE DEFINE 0x10 ; User mode
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FIQ_MODE DEFINE 0x11 ; Fast Interrupt Request mode
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IRQ_MODE DEFINE 0x12 ; Interrupt Request mode
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SVC_MODE DEFINE 0x13 ; Supervisor mode
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ABT_MODE DEFINE 0x17 ; Abort mode
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UND_MODE DEFINE 0x1B ; Undefined Instruction mode
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SYS_MODE DEFINE 0x1F ; System mode
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I_Bit DEFINE 0x80 ; IRQ Disable Bit
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F_Bit DEFINE 0x40 ; FIQ Disable Bit
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;---------------------------------------------------------------
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; ?RESET
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; Reset Vector.
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; Normally, segment INTVEC is linked at address 0.
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; For debugging purposes, INTVEC may be placed at other
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; addresses.
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; A debugger that honors the entry point will start the
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; program in a normal way even if INTVEC is not at address 0.
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;---------------------------------------------------------------
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MODULE ?RESET
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COMMON INTVEC:CODE:NOROOT(2)
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PUBLIC __program_start
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EXTERN ?cstartup
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EXTERN undef_handler, swi_handler, prefetch_handler
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EXTERN data_handler, irq_handler, fiq_handler
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EXTERN vPortYieldProcessor
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CODE32 ; Always ARM mode after reset
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__program_start
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org 0x00
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B InitReset ; 0x00 Reset handler
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undefvec:
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B undefvec ; 0x04 Undefined Instruction
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swivec:
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B vPortYieldProcessor ; 0x08 Software Interrupt
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pabtvec:
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B pabtvec ; 0x0C Prefetch Abort
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dabtvec:
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B dabtvec ; 0x10 Data Abort
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rsvdvec:
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B rsvdvec ; 0x14 reserved
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irqvec:
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LDR PC, [PC, #-0xFF0] ; Jump directly to the address given by the AIC
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fiqvec: ; 0x1c FIQ
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;---------------------------------------------------------------
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; ?CSTARTUP
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;---------------------------------------------------------------
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RSEG IRQ_STACK:DATA(2)
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RSEG SVC_STACK:DATA:NOROOT(2)
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RSEG CSTACK:DATA(2)
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RSEG ICODE:CODE:NOROOT(2)
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EXTERN ?main
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; Execution starts here.
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; After a reset, the mode is ARM, Supervisor, interrupts disabled.
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CODE32
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InitReset
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; Add initialization needed before setup of stackpointers here
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; Initialize the stack pointers.
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; The pattern below can be used for any of the exception stacks:
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; FIQ, IRQ, SVC, ABT, UND, SYS.
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; The USR mode uses the same stack as SYS.
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; The stack segments must be defined in the linker command file,
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; and be declared above.
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mrs r0,cpsr ; Original PSR value
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bic r0,r0,#MODE_BITS ; Clear the mode bits
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orr r0,r0,#IRQ_MODE ; Set IRQ mode bits
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msr cpsr_c,r0 ; Change the mode
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ldr sp,=SFE(IRQ_STACK) & 0xFFFFFFF8 ; End of IRQ_STACK
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bic r0,r0,#MODE_BITS ; Clear the mode bits
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orr r0,r0,#SYS_MODE ; Set System mode bits
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msr cpsr_c,r0 ; Change the mode
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ldr sp,=SFE(CSTACK) & 0xFFFFFFF8 ; End of CSTACK
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bic r0,r0,#MODE_BITS ; Clear the mode bits
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orr r0,r0,#SVC_MODE ; Set System mode bits
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msr cpsr_c,r0 ; Change the mode
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ldr sp,=SFE(SVC_STACK) & 0xFFFFFFF8 ; End of CSTACK
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; Must start in supervisor mode.
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MSR CPSR_c, #SVC_MODE|I_Bit|F_Bit
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; Add more initialization here
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; Continue to ?main for more IAR specific system startup
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ldr r0,=?main
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bx r0
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;---------------------------------------------------------------
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; ?EXEPTION_VECTOR
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; This module is only linked if needed for closing files.
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;---------------------------------------------------------------
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PUBLIC AT91F_Default_FIQ_handler
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PUBLIC AT91F_Default_IRQ_handler
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PUBLIC AT91F_Spurious_handler
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CODE32 ; Always ARM mode after exeption
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AT91F_Default_FIQ_handler
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b AT91F_Default_FIQ_handler
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AT91F_Default_IRQ_handler
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b AT91F_Default_IRQ_handler
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AT91F_Spurious_handler
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b AT91F_Spurious_handler
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ENDMOD
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END
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ENDMOD
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END
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