mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-11-04 11:09:01 +01:00
224 lines
8.1 KiB
Plaintext
224 lines
8.1 KiB
Plaintext
;------------------------------------------------------------------------------
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;- ATMEL Microcontroller Software Support - ROUSSET -
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;------------------------------------------------------------------------------
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; The software is delivered "AS IS" without warranty or condition of any
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; kind, either express, implied or statutory. This includes without
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; limitation any warranty or condition with respect to merchantability or
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; fitness for any particular purpose, or against the infringements of
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; intellectual property rights of others.
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;-----------------------------------------------------------------------------
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;- File source : Cstartup.s79
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;- Object : Generic CStartup for IAR No Use REMAP
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;- Compilation flag : None
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;-
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;- 1.0 15/Jun/04 JPP : Creation
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;------------------------------------------------------------------------------
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#include "AT91SAM7X256_inc.h"
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;------------------------------------------------------------------------------
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;- Area Definition
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;------------------------------------------------------------------------------
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;---------------------------------------------------------------
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; ?RESET
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; Reset Vector.
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; Normally, segment INTVEC is linked at address 0.
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; For debugging purposes, INTVEC may be placed at other
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; addresses.
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; A debugger that honors the entry point will start the
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; program in a normal way even if INTVEC is not at address 0.
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;-------------------------------------------------------------
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PROGRAM ?RESET
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RSEG INTRAMSTART_REMAP
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RSEG INTRAMEND_REMAP
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EXTERN vPortYieldProcessor
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RSEG ICODE:CODE:ROOT(2)
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CODE32 ; Always ARM mode after reset
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org 0
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reset
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;------------------------------------------------------------------------------
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;- Exception vectors
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;--------------------
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;- These vectors can be read at address 0 or at RAM address
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;- They ABSOLUTELY requires to be in relative addresssing mode in order to
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;- guarantee a valid jump. For the moment, all are just looping.
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;- If an exception occurs before remap, this would result in an infinite loop.
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;- To ensure if a exeption occurs before start application to infinite loop.
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;------------------------------------------------------------------------------
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B InitReset ; 0x00 Reset handler
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undefvec:
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B undefvec ; 0x04 Undefined Instruction
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swivec:
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B vPortYieldProcessor ; 0x08 Software Interrupt
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pabtvec:
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B pabtvec ; 0x0C Prefetch Abort
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dabtvec:
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B dabtvec ; 0x10 Data Abort
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rsvdvec:
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B rsvdvec ; 0x14 reserved
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irqvec:
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LDR PC, [PC, #-0xF20] ; Jump directly to the address given by the AIC
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fiqvec: ; 0x1c FIQ
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;------------------------------------------------------------------------------
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;- Function : FIQ_Handler_Entry
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;- Treatments : FIQ Controller Interrupt Handler.
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;- Called Functions : AIC_FVR[interrupt]
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;------------------------------------------------------------------------------
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FIQ_Handler_Entry:
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;- Switch in SVC/User Mode to allow User Stack access for C code
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; because the FIQ is not yet acknowledged
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;- Save and r0 in FIQ_Register
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mov r9,r0
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ldr r0 , [r8, #AIC_FVR]
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msr CPSR_c,#I_BIT | F_BIT | ARM_MODE_SVC
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;- Save scratch/used registers and LR in User Stack
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stmfd sp!, { r1-r3, r12, lr}
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;- Branch to the routine pointed by the AIC_FVR
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mov r14, pc
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bx r0
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;- Restore scratch/used registers and LR from User Stack
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ldmia sp!, { r1-r3, r12, lr}
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;- Leave Interrupts disabled and switch back in FIQ mode
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msr CPSR_c, #I_BIT | F_BIT | ARM_MODE_FIQ
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;- Restore the R0 ARM_MODE_SVC register
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mov r0,r9
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;- Restore the Program Counter using the LR_fiq directly in the PC
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subs pc,lr,#4
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InitReset:
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;------------------------------------------------------------------------------
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;- Low level Init (PMC, AIC, ? ....) by C function AT91F_LowLevelInit
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;------------------------------------------------------------------------------
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EXTERN AT91F_LowLevelInit
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#define __iramend SFB(INTRAMEND_REMAP)
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;- minumum C initialization
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;- call AT91F_LowLevelInit( void)
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ldr r13,=__iramend ; temporary stack in internal RAM
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;--Call Low level init function in ABSOLUTE through the Interworking
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ldr r0,=AT91F_LowLevelInit
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mov lr, pc
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bx r0
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;------------------------------------------------------------------------------
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;- Stack Sizes Definition
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;------------------------
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;- Interrupt Stack requires 2 words x 8 priority level x 4 bytes when using
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;- the vectoring. This assume that the IRQ management.
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;- The Interrupt Stack must be adjusted depending on the interrupt handlers.
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;- Fast Interrupt not requires stack If in your application it required you must
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;- be definehere.
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;- The System stack size is not defined and is limited by the free internal
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;- SRAM.
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;------------------------------------------------------------------------------
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;------------------------------------------------------------------------------
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;- Top of Stack Definition
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;-------------------------
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;- Interrupt and Supervisor Stack are located at the top of internal memory in
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;- order to speed the exception handling context saving and restoring.
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;- ARM_MODE_SVC (Application, C) Stack is located at the top of the external memory.
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;------------------------------------------------------------------------------
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IRQ_STACK_SIZE EQU 300
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ARM_MODE_FIQ EQU 0x11
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ARM_MODE_IRQ EQU 0x12
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ARM_MODE_SVC EQU 0x13
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I_BIT EQU 0x80
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F_BIT EQU 0x40
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;------------------------------------------------------------------------------
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;- Setup the stack for each mode
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;-------------------------------
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ldr r0, =__iramend
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;- Set up Fast Interrupt Mode and set FIQ Mode Stack
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msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT
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;- Init the FIQ register
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ldr r8, =AT91C_BASE_AIC
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;- Set up Interrupt Mode and set IRQ Mode Stack
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msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT
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mov r13, r0 ; Init stack IRQ
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sub r0, r0, #IRQ_STACK_SIZE
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;- Enable interrupt & Set up Supervisor Mode and set Supervisor Mode Stack
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msr CPSR_c, #ARM_MODE_SVC
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mov r13, r0
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;---------------------------------------------------------------
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; ?CSTARTUP
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;---------------------------------------------------------------
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EXTERN __segment_init
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EXTERN main
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; Initialize segments.
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; __segment_init is assumed to use
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; instruction set and to be reachable by BL from the ICODE segment
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; (it is safest to link them in segment ICODE).
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ldr r0,=__segment_init
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mov lr, pc
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bx r0
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PUBLIC __main
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?jump_to_main:
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ldr lr,=?call_exit
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ldr r0,=main
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__main:
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bx r0
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;------------------------------------------------------------------------------
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;- Loop for ever
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;---------------
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;- End of application. Normally, never occur.
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;- Could jump on Software Reset ( B 0x0 ).
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;------------------------------------------------------------------------------
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?call_exit:
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End
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b End
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;---------------------------------------------------------------
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; ?EXEPTION_VECTOR
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; This module is only linked if needed for closing files.
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;---------------------------------------------------------------
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PUBLIC AT91F_Default_FIQ_handler
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PUBLIC AT91F_Default_IRQ_handler
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PUBLIC AT91F_Spurious_handler
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CODE32 ; Always ARM mode after exeption
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AT91F_Default_FIQ_handler
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b AT91F_Default_FIQ_handler
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AT91F_Default_IRQ_handler
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b AT91F_Default_IRQ_handler
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AT91F_Spurious_handler
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b AT91F_Spurious_handler
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ENDMOD
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END
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