Richard Barry 6ffaa6f018 Correct alignment issue in GCC and RVDS Cortex-A9 port that was preventing full floating point usage in interrupts (other ports will be updated likewise). ...

Update the Zynq demo to test the GCC Cortex-A9 port layer modification mentioned on the line above.

2017-01-18 18:33:48 +00:00

..

src

Correct alignment issue in GCC and RVDS Cortex-A9 port that was preventing full floating point usage in interrupts (other ports will be updated likewise).

2017-01-18 18:33:48 +00:00

.cproject

Correct alignment issue in GCC and RVDS Cortex-A9 port that was preventing full floating point usage in interrupts (other ports will be updated likewise).

2017-01-18 18:33:48 +00:00

.project

Completely re-generate the Zynq 7000 demo using the 2016.1 SDK tools.

2016-04-25 17:24:54 +00:00