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			194 lines
		
	
	
		
			6.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			194 lines
		
	
	
		
			6.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * FreeRTOS Kernel <DEVELOPMENT BRANCH>
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 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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 *
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 * SPDX-License-Identifier: MIT
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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 * this software and associated documentation files (the "Software"), to deal in
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 * the Software without restriction, including without limitation the rights to
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 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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 * the Software, and to permit persons to whom the Software is furnished to do so,
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 * subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in all
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 * copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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 *
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 * https://www.FreeRTOS.org
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 * https://github.com/FreeRTOS
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 *
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 */
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the ST STR75x ARM7
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* port.
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*----------------------------------------------------------*/
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/* Library includes. */
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#include "75x_tb.h"
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#include "75x_eic.h"
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Constants required to setup the initial stack. */
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#define portINITIAL_SPSR           ( ( StackType_t ) 0x1f )      /* System mode, ARM mode, interrupts enabled. */
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#define portTHUMB_MODE_BIT         ( ( StackType_t ) 0x20 )
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#define portINSTRUCTION_SIZE       ( ( StackType_t ) 4 )
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/* Constants required to handle critical sections. */
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#define portNO_CRITICAL_NESTING    ( ( uint32_t ) 0 )
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/* Prescale used on the timer clock when calculating the tick period. */
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#define portPRESCALE               20
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/*-----------------------------------------------------------*/
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/* Setup the TB to generate the tick interrupts. */
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static void prvSetupTimerInterrupt( void );
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/*-----------------------------------------------------------*/
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/*
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 * Initialise the stack of a task to look exactly as if a call to
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 * portSAVE_CONTEXT had been called.
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 *
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 * See header file for description.
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 */
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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                                     TaskFunction_t pxCode,
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                                     void * pvParameters )
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{
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    StackType_t * pxOriginalTOS;
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    pxOriginalTOS = pxTopOfStack;
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    /* To ensure asserts in tasks.c don't fail, although in this case the assert
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     * is not really required. */
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    pxTopOfStack--;
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    /* Setup the initial stack of the task.  The stack is set exactly as
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     * expected by the portRESTORE_CONTEXT() macro. */
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    /* First on the stack is the return address - which in this case is the
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     * start of the task.  The offset is added to make the return address appear
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     * as it would within an IRQ ISR. */
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    *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
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    pxTopOfStack--;
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    *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa;    /* R14 */
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    pxTopOfStack--;
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    *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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    pxTopOfStack--;
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    *pxTopOfStack = ( StackType_t ) 0x12121212;    /* R12 */
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    pxTopOfStack--;
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    *pxTopOfStack = ( StackType_t ) 0x11111111;    /* R11 */
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    pxTopOfStack--;
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    *pxTopOfStack = ( StackType_t ) 0x10101010;    /* R10 */
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    pxTopOfStack--;
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    *pxTopOfStack = ( StackType_t ) 0x09090909;    /* R9 */
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    pxTopOfStack--;
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    *pxTopOfStack = ( StackType_t ) 0x08080808;    /* R8 */
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    pxTopOfStack--;
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    *pxTopOfStack = ( StackType_t ) 0x07070707;    /* R7 */
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    pxTopOfStack--;
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    *pxTopOfStack = ( StackType_t ) 0x06060606;    /* R6 */
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    pxTopOfStack--;
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    *pxTopOfStack = ( StackType_t ) 0x05050505;    /* R5 */
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    pxTopOfStack--;
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    *pxTopOfStack = ( StackType_t ) 0x04040404;    /* R4 */
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    pxTopOfStack--;
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    *pxTopOfStack = ( StackType_t ) 0x03030303;    /* R3 */
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    pxTopOfStack--;
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    *pxTopOfStack = ( StackType_t ) 0x02020202;    /* R2 */
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    pxTopOfStack--;
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    *pxTopOfStack = ( StackType_t ) 0x01010101;    /* R1 */
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    pxTopOfStack--;
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    /* When the task starts is will expect to find the function parameter in
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     * R0. */
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    *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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    pxTopOfStack--;
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    /* The status register is set for system mode, with interrupts enabled. */
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    *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
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    #ifdef THUMB_INTERWORK
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    {
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        /* We want the task to start in thumb mode. */
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        *pxTopOfStack |= portTHUMB_MODE_BIT;
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    }
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    #endif
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    pxTopOfStack--;
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    /* Interrupt flags cannot always be stored on the stack and will
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     * instead be stored in a variable, which is then saved as part of the
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     * tasks context. */
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    *pxTopOfStack = portNO_CRITICAL_NESTING;
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    return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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BaseType_t xPortStartScheduler( void )
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{
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    extern void vPortISRStartFirstTask( void );
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    /* Start the timer that generates the tick ISR.  Interrupts are disabled
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     * here already. */
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    prvSetupTimerInterrupt();
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    /* Start the first task. */
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    vPortISRStartFirstTask();
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    /* Should not get here! */
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    return 0;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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    /* It is unlikely that the ARM port will require this function as there
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     * is nothing to return to.  */
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}
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/*-----------------------------------------------------------*/
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static void prvSetupTimerInterrupt( void )
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{
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    EIC_IRQInitTypeDef EIC_IRQInitStructure;
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    TB_InitTypeDef TB_InitStructure;
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    /* Setup the EIC for the TB. */
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    EIC_IRQInitStructure.EIC_IRQChannelCmd = ENABLE;
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    EIC_IRQInitStructure.EIC_IRQChannel = TB_IRQChannel;
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    EIC_IRQInitStructure.EIC_IRQChannelPriority = 1;
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    EIC_IRQInit( &EIC_IRQInitStructure );
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    /* Setup the TB for the generation of the tick interrupt. */
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    TB_InitStructure.TB_Mode = TB_Mode_Timing;
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    TB_InitStructure.TB_CounterMode = TB_CounterMode_Down;
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    TB_InitStructure.TB_Prescaler = portPRESCALE - 1;
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    TB_InitStructure.TB_AutoReload = ( ( configCPU_CLOCK_HZ / portPRESCALE ) / configTICK_RATE_HZ );
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    TB_Init( &TB_InitStructure );
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    /* Enable TB Update interrupt */
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    TB_ITConfig( TB_IT_Update, ENABLE );
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    /* Clear TB Update interrupt pending bit */
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    TB_ClearITPendingBit( TB_IT_Update );
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    /* Enable TB */
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    TB_Cmd( ENABLE );
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}
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/*-----------------------------------------------------------*/
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