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4d9cd906d3
* port: riscv: Split the number of registers and the size of the context * port: riscv: Create some macros for the FPU context * port: riscv: Add a couple of macros that store fpu context * port: riscv: Update the stack init function to include the fpu context size * port: riscv: Add a chip_specific_extensions file that includes the F extension * Update dictionary to include some risc-v instructions * port: riscv: Fix a few typos * port: riscv: Apply @aggarg's sugestions