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According to the RISC-V Privileged Architecture Specification (20211203), writing Initial or Clean to the FS field of mstatus may result in the FS value getting set to Dirty in some implementations. This means we cannot rely on reading back the same FS value after writing to mstatus. Previously, the context restore code would: 1. Write an FS value to mstatus 2. Read mstatus again at a later point 3. Use the read FS value to determine FPU status This change updates the context restore code to use the mstatus value from the saved context instead of re-reading mstatus after writing to it. This required chaning the location of the mstatus slot in the context. Fixes: https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/1327 Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
/* * The FreeRTOS kernel's RISC-V port is split between the the code that is * common across all currently supported RISC-V chips (implementations of the * RISC-V ISA), and code that tailors the port to a specific RISC-V chip: * * + FreeRTOS\Source\portable\GCC\RISC-V\portASM.S contains the code that * is common to all currently supported RISC-V chips. There is only one * portASM.S file because the same file is built for all RISC-V target chips. * * + Header files called freertos_risc_v_chip_specific_extensions.h contain the * code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V * chip. There are multiple freertos_risc_v_chip_specific_extensions.h files * as there are multiple RISC-V chip implementations. * * !!!NOTE!!! * TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h * HEADER FILE FOR THE CHIP IN USE. This is done using the assembler's (not the * compiler's!) include path. For example, if the chip in use includes a core * local interrupter (CLINT) and does not include any chip specific register * extensions then add the path below to the assembler's include path: * FreeRTOS\Source\portable\GCC\RISC-V\chip_specific_extensions\RV32I_CLINT_no_extensions * */