Richard Barry 58ba10eee8 Update version number in readiness for V10.2.0 release.

2019-02-17 22:36:16 +00:00

..

.settings

Fix bug in core_cm3.c atomic macros.

2019-02-16 01:08:38 +00:00

blinky_demo

Update version number in readiness for V10.2.0 release.

2019-02-17 22:36:16 +00:00

full_demo

Update version number in readiness for V10.2.0 release.

2019-02-17 22:36:16 +00:00

Microsemi_Code

Re-org of RISC-V file structure and naming step 2.

2018-12-30 23:53:47 +00:00

.cproject

Fix bug in core_cm3.c atomic macros.

2019-02-16 01:08:38 +00:00

.project

Fix bug in core_cm3.c atomic macros.

2019-02-16 01:08:38 +00:00

Demo Documentation.url

Replace the pdf RISC-V documentation with links to the documentation web pages.

2019-02-16 01:15:33 +00:00

FreeRTOSConfig.h

Move the RISC-V pxPortInitialiseStack() implementation to the assembly port file from the C port file so it can have access to the number of chip specific registers it needs to save space for on the stack.

2018-12-30 20:00:43 +00:00

hw_platform.h

Retarget Softconsole RISC-V demo from IGLOO2 to Renode as it can have more RAM and therefore have more test tasks running.

2018-12-24 17:48:10 +00:00

main.c

Update version number in readiness for V10.2.0 release.

2019-02-17 22:36:16 +00:00

microsemi-riscv-renode.ld

Retarget Softconsole RISC-V demo from IGLOO2 to Renode as it can have more RAM and therefore have more test tasks running.

2018-12-24 17:48:10 +00:00

RTOSDemo Debug Renode.launch

Move the RISC-V pxPortInitialiseStack() implementation to the assembly port file from the C port file so it can have access to the number of chip specific registers it needs to save space for on the stack.

2018-12-30 20:00:43 +00:00

RTOSDemo-start-renode-emulator-and-attach.launch

Retarget Softconsole RISC-V demo from IGLOO2 to Renode as it can have more RAM and therefore have more test tasks running.

2018-12-24 17:48:10 +00:00