`timescale 1ns / 1ps

`include "src/del_meas/del_meas.v"

module del_meas_cdc #(
	parameter WIDTH = 10
)(
	input clkMeas, clkIntf, rst, clear,
	input ref, sig, arm, ack,
	output listening, done, negative, [WIDTH-1:0] delay, [2:0]state_dbg
);

wire arm_M, ack_M, listening_M, done_M;

cdc arm_cdc (
	.tclk(clkMeas),
	.rst(rst),
	.sin(arm),
	.tout(arm_M)
);

cdc ack_cdc (
	.tclk(clkMeas),
	.rst(rst),
	.sin(ack),
	.tout(ack_M)
);

cdc listening_cdc (
	.tclk(clkIntf),
	.rst(rst),
	.sin(listening_M),
	.tout(listening)
);

cdc done_cdc (
	.tclk(clkIntf),
	.rst(rst),
	.sin(done_M),
	.tout(done)
);

del_meas #(
	.WIDTH(WIDTH)
) del_meas_nocdc (
    .clk(clkMeas), 
    .rst(rst), 
    .clear(clear), 
	 
    .ref(ref), 
    .sig(sig), 
	 
    .arm(arm_M), 
    .listening(listening_M), 
    .done(done_M), 
    .ack(ack_M), 
	 
    .negative(negative), 
    .delay(delay), 
	 
    .state_dbg(state_dbg)
);


endmodule
