mem_data[7:0] mem_data[7:0] mem_data[7:0] mem_data[7:0] ASCIIRADIX mem_addr[11:0] mem_addr[11:0] HEXRADIX clk clk true #ffff00 rst rst TXEN TXEN TXD[1:0] TXD[1:0] deser[7:0] deser[7:0] HEXRADIX deser[7:0] deser[7:0] ASCIIRADIX ctrl_word[31:0] ctrl_word[31:0] label mem[0:444,7:0] mem[0:444,7:0] mem[25:0,7:0] ASCIIRADIX MEM ACC CTRL label 128 128 255 230 230 230 transmitter_busy transmitter_busy start start frame_addr[11:0] frame_addr[11:0] frame_len[10:0] frame_len[10:0] UNSIGNEDDECRADIX busy busy tx_data_in[7:0] tx_data_in[7:0] ASCIIRADIX tx_data_in[7:0] tx_data_in[7:0] HEXRADIX tx_not_full tx_not_full tx_wrt tx_wrt state[2:0] state[2:0] UNSIGNEDDECRADIX len_left[10:0] len_left[10:0] UNSIGNEDDECRADIX crc_out[31:0] crc_out[31:0] HEXRADIX SERIALIZER label 128 128 255 230 230 230 mem[3:0,7:0] mem[3:0,7:0] ASCIIRADIX [3,7:0] mem[3,7:0] HEXRADIX [2,7:0] mem[2,7:0] HEXRADIX [1,7:0] mem[1,7:0] HEXRADIX [0,7:0] mem[0,7:0] HEXRADIX