From 4ddb02fb170aa4a24fa85fe6fa971612dd5f0d3e Mon Sep 17 00:00:00 2001 From: Epagris Date: Tue, 29 Oct 2024 13:22:45 +0100 Subject: [PATCH] - H723 added - some H7-related defines reworked --- usb_common_defs.h | 9 ++++++++- usb_driver.c | 27 ++++++++++++++++++++------- 2 files changed, 28 insertions(+), 8 deletions(-) diff --git a/usb_common_defs.h b/usb_common_defs.h index f5f6678..784ebd7 100644 --- a/usb_common_defs.h +++ b/usb_common_defs.h @@ -1,9 +1,16 @@ #ifndef CORE_USB_USB_COMMON_DEFS #define CORE_USB_USB_COMMON_DEFS -#if defined(STM32H745xx) || defined(STM32H743xx) +#if defined(STM32H745xx) || defined(STM32H743xx) || defined(STM32H723xx) #include #include + +#if defined(STM32H745xx) || defined(STM32H743xx) +#define USBG (USB_OTG_FS) +#elif defined(STM32H723xx) +#define USBG (USB_OTG_HS) +#endif + #define USB_STM32H7 #elif defined(STM32F407xx) || defined(STM32F401xC) #include diff --git a/usb_driver.c b/usb_driver.c index cc4e155..0327a51 100644 --- a/usb_driver.c +++ b/usb_driver.c @@ -52,7 +52,11 @@ static const char *FIFO_STATUS_STR[6] = { // --------------- #if defined(USB_STM32H7) +#ifndef STM32H723xx #define USB_GPIO_AF (GPIO_AF10_OTG2_FS) +#else +//#define USB_GPIO_AF (GPIO_AF10_OTG1_HS) +#endif #elif defined(USB_STM32F4) #ifdef USB_HIGH_SPEED #define USB_GPIO_AF (GPIO_AF10_OTG_HS) @@ -66,11 +70,13 @@ static const char *FIFO_STATUS_STR[6] = { void usbdrv_gpio_init() { // turn GPIO-s into AF mode __HAL_RCC_GPIOA_CLK_ENABLE(); // turn ON GPIOA clocks + #ifdef USB_HIGH_SPEED __HAL_RCC_GPIOB_CLK_ENABLE(); __HAL_RCC_GPIOC_CLK_ENABLE(); #endif +#ifdef USB_GPIO_AF GPIO_InitTypeDef gpio_init; gpio_init.Mode = GPIO_MODE_AF_PP; gpio_init.Speed = GPIO_SPEED_FREQ_VERY_HIGH; @@ -112,6 +118,7 @@ void usbdrv_gpio_init() { // HAL_GPIO_Init(GPIOA, &gpio_init); // USB VBUSSENSE #endif +#endif } // --------------- @@ -119,7 +126,11 @@ void usbdrv_gpio_init() { #ifdef USB_HIGH_SPEED #define USB_IRQn OTG_HS_IRQn #else +#ifndef STM32H723xx #define USB_IRQn OTG_FS_IRQn +#else +#define USB_IRQn OTG_HS_IRQn +#endif #endif // initialize USB subsystem @@ -201,7 +212,9 @@ __weak void usbdrv_ulpi_init() { void usbdrv_periph_init() { #if defined(USB_STM32H7) HAL_PWREx_EnableUSBVoltageDetector(); - WAIT_FOR_nBIT(PWR->CR3, PWR_CR3_USB33RDY); + //WAIT_FOR_nBIT(PWR->CR3, PWR_CR3_USB33RDY); + + __HAL_RCC_USB1_OTG_HS_CLK_ENABLE(); #endif #ifdef USB_STM32F4 @@ -214,7 +227,7 @@ void usbdrv_periph_init() { #endif #endif - // HAL_Delay(1000); + HAL_Delay(1000); //__HAL_RCC_USB_OTG_FS_ULPI_CLK_ENABLE(); //__HAL_RCC_USB_OTG_FS_FORCE_RESET(); @@ -224,6 +237,7 @@ void usbdrv_periph_init() { SET_BIT(USBG->GUSBCFG, USB_OTG_GUSBCFG_PHYSEL); // select the internal FS PHY SET_BIT(USBG->GRSTCTL, USB_OTG_GRSTCTL_CSRST); // reset USB core + HAL_Delay(1); WAIT_FOR_BIT(USBG->GRSTCTL, USB_OTG_GRSTCTL_CSRST); #else @@ -243,11 +257,6 @@ void usbdrv_periph_init() { #endif #endif - (uint32_t *)(((uint32_t)USBG) + 0x028), // DIEPTXF0 - (uint32_t *)(((uint32_t)USBG) + 0x104), // DIEPTXF1 - (uint32_t *)(((uint32_t)USBG) + 0x108), // DIEPTXF2 - (uint32_t *)(((uint32_t)USBG) + 0x10C), // DIEPTXF3 - CLEAR_BIT(USBG->GCCFG, USB_OTG_GCCFG_PWRDWN); // power down the peripheral CLEAR_BIT(USBG->GAHBCFG, USB_OTG_GAHBCFG_GINT); // mask all interrupts for now @@ -1029,7 +1038,11 @@ bool usbdrv_get_endpoint_interrupt_flag(uint8_t ep, uint8_t dir) { #ifdef USB_HIGH_SPEED void OTG_HS_IRQHandler() #else +#ifndef STM32H723xx void OTG_FS_IRQHandler() +#else +void OTG_HS_IRQHandler() +#endif #endif {