epagris/flatUSB
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- OtherSpeedConfigution descriptor handling added

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- PWRDWN flag is kept cleared in HS mode
- RX FIFO size increased to 1024 when operating in HS mode
This commit is contained in:
Wiesner András 2024-06-25 09:24:51 +02:00
parent 5a4d170102
commit c7b69000e7
2 changed files with 19 additions and 6 deletions
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5
usb.c
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@ -131,8 +131,13 @@ void usbcore_process_setup_pckt(const uint8_t *data, uint16_t size, uint8_t stag
SET_TRANSMISSION_POINTER(&devDesc);
break;
case UD_Configuration: // CONFIGURATION DESCRIPTOR
case UD_OtherSpeedConfiguration: // OTHER SPEED CONFIGURATION DESCRIPTOR
DETERMINE_TRANSFER_SIZE(confDescs[desc_index]->wTotalLength);
SET_TRANSMISSION_POINTER(confDescs[desc_index]);
if (desc_type == UD_OtherSpeedConfiguration) { // change bDescriptorType to Other_Speed_Configuration
confDescs[desc_index]->bDescriptorType = UD_OtherSpeedConfiguration;
}
break;
case UD_String: // STRING DESCRIPTOR
DETERMINE_TRANSFER_SIZE(strDescs[desc_index]->bLength);

20
usb_driver.c
View File

@ -123,7 +123,7 @@ void usbdrv_init() {
usbdrv_initial_ep0_setup();
usbdrv_power_and_connect(true);
NVIC_SetPriority(USB_IRQn, 0);
NVIC_SetPriority(USB_IRQn, 7);
NVIC_EnableIRQ(USB_IRQn);
}
@ -237,7 +237,7 @@ void usbdrv_periph_init() {
CLEAR_BIT(USBG->GAHBCFG, USB_OTG_GAHBCFG_GINT); // mask all interrupts for now
CLEAR_BIT(USBG->GUSBCFG, USB_OTG_GUSBCFG_HNPCAP | USB_OTG_GUSBCFG_SRPCAP); // disable HNP and SRP
WRITE_FIELD(USBG->GUSBCFG, USB_OTG_GUSBCFG_TRDT, TRDT_VALUE); // set TRDT according to the RM
// WRITE_FIELD(USBG->GUSBCFG, USB_OTG_GUSBCFG_TOCAL, TOCAL_VALUE); // set TOCAL
//WRITE_FIELD(USBG->GUSBCFG, USB_OTG_GUSBCFG_TOCAL, TOCAL_VALUE); // set TOCAL
CLEAR_BIT(USBG->GUSBCFG, USB_OTG_GUSBCFG_FHMOD); // clear Host mode forcing
SET_BIT(USBG->GUSBCFG, USB_OTG_GUSBCFG_FDMOD); // force Device mode
@ -258,8 +258,8 @@ void usbdrv_periph_init() {
#ifdef USB_HIGH_SPEED
// WRITE_FIELD(USBD->DCFG, USB_OTG_DCFG_DSPD, USB_LINESPEED_FULL_SPEED);
// WRITE_FIELD(USBD->DCFG, USB_OTG_DCFG_DSPD, USB_LINESPEED_HIGH_SPEED_ULPI);
WRITE_FIELD(USBD->DCFG, USB_OTG_DCFG_DSPD, USB_LINESPEED_FULL_SPEED_ULPI);
WRITE_FIELD(USBD->DCFG, USB_OTG_DCFG_DSPD, USB_LINESPEED_HIGH_SPEED_ULPI);
//WRITE_FIELD(USBD->DCFG, USB_OTG_DCFG_DSPD, USB_LINESPEED_FULL_SPEED_ULPI);
#else
WRITE_FIELD(USBD->DCFG, USB_OTG_DCFG_DSPD, USB_LINESPEED_FULL_SPEED); // there's no other possible option
#endif
@ -301,10 +301,14 @@ void usbdrv_periph_init() {
void usbdrv_power_and_connect(bool en) {
if (en) { // ON
CLEAR_BIT(USBD->DCTL, USB_OTG_DCTL_SDIS);
#ifndef USB_HIGH_SPEED
SET_BIT(USBG->GCCFG, USB_OTG_GCCFG_PWRDWN); // actually, this is power UP
#endif
} else { // OFF
SET_BIT(USBD->DCTL, USB_OTG_DCTL_SDIS);
#ifndef USB_HIGH_SPEED
CLEAR_BIT(USBG->GCCFG, USB_OTG_GCCFG_PWRDWN);
#endif
}
}
@ -382,9 +386,13 @@ void usbdrv_fetch_endpoint_configuration(uint8_t config_index) {
#define USB_RX_FIFO_SETUP_RESERVATION_DWORDS (10)
#define USB_MIN_GROSS_TX_FIFO_SIZE (2 * USB_MIN_EP_FIFO_SIZE)
#if defined(USB_STM32F4) && !defined(USB_HIGH_SPEED)
#if defined(USB_STM32F4)
#ifndef USB_HIGH_SPEED
#define USB_MIN_GROSS_RX_FIFO_SIZE (2 * USB_MIN_EP_FIFO_SIZE + USB_RX_FIFO_SETUP_RESERVATION_DWORDS * 4)
#elif defined(USB_STM32H7) || defined(USB_HIGH_SPEED)
#else
#define USB_MIN_GROSS_RX_FIFO_SIZE (1024)
#endif
#elif defined(USB_STM32H7)
#define USB_MIN_GROSS_RX_FIFO_SIZE (256)
#endif