diff --git a/usb_driver.c b/usb_driver.c
index 1345bf2..5b54e7c 100644
--- a/usb_driver.c
+++ b/usb_driver.c
@@ -43,7 +43,7 @@ static const char *FIFO_STATUS_STR[6] = {
 // ---------------
 
 #if defined(STM32H745xx) || defined(STM32H743xx)
-#define USB_GPIO_AF (GPIO_AF10_OTG1_FS)
+#define USB_GPIO_AF (GPIO_AF10_OTG2_FS)
 #elif defined(STM32F407xx)
 #define USB_GPIO_AF (GPIO_AF10_OTG_FS)
 #endif
@@ -56,11 +56,16 @@ void usbdrv_gpio_init() {
 
     GPIO_InitTypeDef gpio_init;
     gpio_init.Mode = GPIO_MODE_AF_PP;
-    gpio_init.Pin = GPIO_PIN_11 | GPIO_PIN_12;
     gpio_init.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
     gpio_init.Pull = GPIO_NOPULL;
     gpio_init.Alternate = USB_GPIO_AF;
 
+    /* Pin initializations cannot be OR-ed together! */
+
+    gpio_init.Pin = GPIO_PIN_11;
+    HAL_GPIO_Init(GPIOA, &gpio_init); // USB D-
+
+    gpio_init.Pin = GPIO_PIN_12;
     HAL_GPIO_Init(GPIOA, &gpio_init); // USB D+
 
     // HAL_GPIO_WritePin(GPIOA, GPIO_PIN_11, GPIO_PIN_SET);
@@ -127,24 +132,37 @@ void usbdrv_init_global_state() {
 #endif
 }
 
+#if defined(STM32H745xx) || defined(STM32H743xx)
+#define TOCAL_VALUE (0x00)
+#define TRDT_VALUE (0x05)
+#elif defined(STM32F407xx)
+#define TOCAL_VALUE (0x07)
+#define TRDT_VALUE (0x06)
+#endif
+
 // ---------------
 
 #define USB_LINESPEED_FULL_SPEED (0b11)
 
 // initialize USB peripheral
 void usbdrv_periph_init() {
+#if defined(STM32H745xx) || defined(STM32H743xx)
+    HAL_PWREx_EnableUSBVoltageDetector();
+    WAIT_FOR_nBIT(PWR->CR3, PWR_CR3_USB33RDY);
+#endif
+
     __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); // enable clock on USB peripheral
+
+    HAL_Delay(1000);
+
     //__HAL_RCC_USB_OTG_FS_ULPI_CLK_ENABLE();
     //__HAL_RCC_USB_OTG_FS_FORCE_RESET();
     //__HAL_RCC_USB_OTG_FS_RELEASE_RESET();
 
-    // HAL_PWREx_EnableUSBReg();
-    // HAL_PWREx_EnableUSBVoltageDetector();
-
 #if defined(STM32H745xx) || defined(STM32H743xx)
     SET_BIT(USBG->GUSBCFG, USB_OTG_GUSBCFG_PHYSEL); // select the internal FS PHY
 
-    SET_BIT(USBG->GRSTCTL, USB_OTG_GRSTCTL_CSRST);  // reset USB core
+    SET_BIT(USBG->GRSTCTL, USB_OTG_GRSTCTL_CSRST); // reset USB core
     WAIT_FOR_BIT(USBG->GRSTCTL, USB_OTG_GRSTCTL_CSRST);
 #endif
 
@@ -152,17 +170,18 @@ void usbdrv_periph_init() {
 
     CLEAR_BIT(USBG->GAHBCFG, USB_OTG_GAHBCFG_GINT);                            // mask all interrupts for now
     CLEAR_BIT(USBG->GUSBCFG, USB_OTG_GUSBCFG_HNPCAP | USB_OTG_GUSBCFG_SRPCAP); // disable HNP and SRP
-    WRITE_FIELD(USBG->GUSBCFG, USB_OTG_GUSBCFG_TRDT, 0x06);                    // set TRDT according to the RM
-    WRITE_FIELD(USBG->GUSBCFG, USB_OTG_GUSBCFG_TOCAL, 0x07);                   // set TOCAL
+    WRITE_FIELD(USBG->GUSBCFG, USB_OTG_GUSBCFG_TRDT, TRDT_VALUE);              // set TRDT according to the RM
+    WRITE_FIELD(USBG->GUSBCFG, USB_OTG_GUSBCFG_TOCAL, TOCAL_VALUE);            // set TOCAL
     SET_BIT(USBG->GUSBCFG, USB_OTG_GUSBCFG_FDMOD);                             // force Device mode
 
 #if defined(STM32H745xx) || defined(STM32H743xx)
-    CLEAR_BIT(USBG->GCCFG, USB_OTG_GCCFG_VBDEN);                               // turn off VBUSSENSE
+    CLEAR_BIT(USBG->GCCFG, USB_OTG_GCCFG_VBDEN);                                // turn on VBUSSENSE
     SET_BIT(USBG->GOTGCTL, USB_OTG_GOTGCTL_BVALOEN | USB_OTG_GOTGCTL_BVALOVAL); // force B-session
 #elif defined(STM32F407xx)
-    SET_BIT(USBG->GCCFG, USB_OTG_GCCFG_NOVBUSSENS);                            // turn off VBUSSENSE
+    SET_BIT(USBG->GCCFG, USB_OTG_GCCFG_NOVBUSSENS); // turn off VBUSSENSE
 #endif
 
+
     // HAL_Delay(50); // it takes time to forcing Device mode takes effect
 
     SET_BIT(USBD->DCTL, USB_OTG_DCTL_SDIS);                               // soft disconnect peripheral (should be upper, but since it's controlled by a Device register, cannot be set before switching to device mode)
@@ -321,7 +340,7 @@ void usbdrv_build_fifo() {
     uint16_t fifo_size = fifo_size_dwords * 4;                                                                             // calculate RX FIFO size in bytes
     fifo_size = CEIL4(MAX(fifo_size, USB_MIN_GROSS_RX_FIFO_SIZE));                                                         // RX FIFO should be at least this large
 
-    //fifo_size *= 2;                 // TODO:
+    // fifo_size *= 2;                 // TODO:
     gs.rx_fifo_size = fifo_size;        // save Rx FIFO size for later
     next_fifo_addr += fifo_size;        // advance next FIFO address
     usbdrv_set_rx_fifo_size(fifo_size); // set Rx FIFO size in hardware