Epagris
dcf2c2b808
added - basic flatUSB_config.h concept added - example JSONs added - CDC request replies fixed
134 lines
4.9 KiB
C
134 lines
4.9 KiB
C
#include "usb_drv.h"
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#include "flatUSB_config.h"
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#include "stm32f4xx_hal.h"
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#include "usb_common.h"
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#include "usb_common_defs.h"
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// ------------------------
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#ifdef USB_HIGH_SPEED
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__weak void usbdrv_ulpi_init() {
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return;
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}
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#endif
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// ------------------------
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// initialize USB peripheral
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void usbdrv_periph_init() {
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USB_CLOCK_ENABLE();
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// HAL_Delay(1000);
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//__HAL_RCC_USB_OTG_FS_ULPI_CLK_ENABLE();
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//__HAL_RCC_USB_OTG_FS_FORCE_RESET();
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//__HAL_RCC_USB_OTG_FS_RELEASE_RESET();
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#if defined(USB_STM32H7)
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SET_BIT(USBG->GUSBCFG, USB_OTG_GUSBCFG_PHYSEL); // select the internal FS PHY
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WAIT_FOR_nBIT_DELAY(USBG->GRSTCTL, USB_OTG_GRSTCTL_AHBIDL, 1);
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SET_BIT(USBG->GRSTCTL, USB_OTG_GRSTCTL_CSRST); // reset the USB core
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HAL_Delay(1);
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WAIT_FOR_BIT_DELAY(USBG->GRSTCTL, USB_OTG_GRSTCTL_CSRST, 1);
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#else
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#if defined(USB_HIGH_SPEED)
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CLEAR_BIT(USBG->GUSBCFG, USB_OTG_GUSBCFG_PHYSEL); // select the external HS PHY
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CLEAR_BIT(USBG->GUSBCFG, USB_OTG_GUSBCFG_TSDPS);
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CLEAR_BIT(USBG->GUSBCFG, USB_OTG_GUSBCFG_ULPIFSLS);
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CLEAR_BIT(USBG->GUSBCFG, USB_OTG_GUSBCFG_ULPIEVBUSD);
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CLEAR_BIT(USBG->GUSBCFG, USB_OTG_GUSBCFG_ULPIEVBUSI);
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// SET_BIT(USBG->GUSBCFG, USB_OTG_GUSBCFG_PHYSEL);
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SET_BIT(USBG->GRSTCTL, USB_OTG_GRSTCTL_CSRST); // reset USB core
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HAL_Delay(1);
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WAIT_FOR_BIT(USBG->GRSTCTL, USB_OTG_GRSTCTL_CSRST);
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usbdrv_ulpi_init(); // initialize PHY
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#endif
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#endif
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CLEAR_BIT(USBG->GCCFG, USB_OTG_GCCFG_PWRDWN); // power the internal transceiver peripheral
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CLEAR_BIT(USBG->GAHBCFG, USB_OTG_GAHBCFG_GINT); // mask all interrupts for now
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CLEAR_BIT(USBG->GUSBCFG, USB_OTG_GUSBCFG_HNPCAP | USB_OTG_GUSBCFG_SRPCAP); // disable HNP and SRP
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WRITE_FIELD(USBG->GUSBCFG, USB_OTG_GUSBCFG_TRDT, TRDT_VALUE); // set TRDT according to the RM
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// WRITE_FIELD(USBG->GUSBCFG, USB_OTG_GUSBCFG_TOCAL, TOCAL_VALUE); // set TOCAL
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CLEAR_BIT(USBG->GUSBCFG, USB_OTG_GUSBCFG_FHMOD); // clear Host mode forcing
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SET_BIT(USBG->GUSBCFG, USB_OTG_GUSBCFG_FDMOD); // force Device mode
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HAL_Delay(25); // wait for Device mode forcing propagation
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WAIT_FOR_BIT(USBG->GINTSTS, 0b1);
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// SET_BIT(USBD->DCTL, USB_OTG_DCTL_SDIS); // soft disconnect peripheral (should be upper, but since it's controlled by a Device register, cannot be set before switching to device mode)
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#if defined(USB_STM32H7)
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CLEAR_BIT(USBG->GCCFG, USB_OTG_GCCFG_VBDEN); // turn off VBUSSENSE
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SET_BIT(USBG->GOTGCTL, USB_OTG_GOTGCTL_BVALOEN | USB_OTG_GOTGCTL_BVALOVAL); // force B-session
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#elif defined(USB_STM32F4)
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SET_BIT(USBG->GCCFG, USB_OTG_GCCFG_NOVBUSSENS); // turn off VBUSSENSE
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CLEAR_BIT(USBG->GCCFG, USB_OTG_GCCFG_VBUSBSEN | USB_OTG_GCCFG_VBUSASEN);
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#endif
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// HAL_Delay(50); // it takes time to forcing Device mode takes effect
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#ifdef USB_HIGH_SPEED
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// WRITE_FIELD(USBD->DCFG, USB_OTG_DCFG_DSPD, USB_LINESPEED_FULL_SPEED);
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// WRITE_FIELD(USBD->DCFG, USB_OTG_DCFG_DSPD, USB_LINESPEED_HIGH_SPEED_ULPI);
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WRITE_FIELD(USBD->DCFG, USB_OTG_DCFG_DSPD, USB_LINESPEED_FULL_SPEED_ULPI);
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#else
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WRITE_FIELD(USBD->DCFG, USB_OTG_DCFG_DSPD, USB_LINESPEED_FULL_SPEED); // there's no other possible option
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#endif
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// allow specific interrupts
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uint32_t intmask = /*USB_OTG_GINTMSK_WUIM | // Wake up */
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USB_OTG_GINTMSK_OEPINT | // OUT EP events
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USB_OTG_GINTMSK_IEPINT | // IN EP events
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USB_OTG_GINTMSK_ENUMDNEM | // (Linespeed) Enumeration (negotiation) done
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USB_OTG_GINTMSK_USBRST | // USB Reset
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USB_OTG_GINTMSK_USBSUSPM | // USB Suspend
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USB_OTG_GINTMSK_RXFLVLM; // RX FIFO level (signal if non-empty)
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USBG->GINTMSK = intmask;
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// set global NAK on all Endpoints
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// usbdrv_set_global_NAK(USB_IN, true);
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// usbdrv_set_global_NAK(USB_OUT, true);
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// flush Tx and Rx FIFOs
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usbdrv_flush_rx_fifo();
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usbdrv_flush_tx_fifo(USB_FLUSH_TX_FIFO_ALL);
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// make Tx FIFO empty interrupt fire when Tx FIFO is emtpy
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// SET_BIT(USBG->GAHBCFG, USB_OTG_GAHBCFG_TXFELVL);
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// set masks for endpoint interrupts
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SET_BIT(USBD->DIEPMSK, USB_OTG_DIEPMSK_XFRCM | USB_OTG_DIEPMSK_TOM | USB_OTG_DIEPMSK_ITTXFEMSK); // transfer complete, timeout and Tx FIFO empty while receiving IN for IN EPs
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SET_BIT(USBD->DOEPMSK, USB_OTG_DOEPMSK_XFRCM | USB_OTG_DOEPMSK_STUPM); // transfer complete and SETUP complete for OUT EPs
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// mask all endpoint interrupts in both directions and also clear flags
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USBD->DAINTMSK = 0;
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USBD->DAINT = 0;
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// enbale global interrupts
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SET_BIT(USBG->GAHBCFG, USB_OTG_GAHBCFG_GINT);
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}
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// initialize USB subsystem
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void usbdrv_init() {
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HAL_NVIC_DisableIRQ(USB_IRQn);
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//usbdrv_init_global_state();
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usbdrv_gpio_init();
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usbdrv_periph_init();
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usbdrv_initial_ep0_setup();
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usbdrv_power_and_connect(true);
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HAL_NVIC_SetPriority(USB_IRQn, 8, 0);
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HAL_NVIC_EnableIRQ(USB_IRQn);
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} |