139 lines
5.7 KiB
C
139 lines
5.7 KiB
C
#ifndef ETH_MAC_DRV_H_
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#define ETH_MAC_DRV_H_
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#include <stdbool.h>
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#include <stm32h7xx.h>
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#define MODEINIT_HALF_DUPLEX (0)
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#define MODEINIT_FULL_DUPLEX (1 << 8)
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#define MODEINIT_SPEED_10MBPS (0)
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#define MODEINIT_SPEED_100MBPS (1)
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// MUST BE 4-BYTE ALIGNED!
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typedef struct {
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uint16_t nextTxDescIdx; // index of next available TX descriptor
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uint16_t txCntSent; // sequence number of last transmitted packet
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uint16_t txCntAcked; // last transmission acknowledged by interrupt
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uint16_t pad0;
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} ETHHW_State;
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typedef struct {
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uint16_t rxRingLen, txRingLen; // RX and TX descriptor ring length
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uint8_t *rxRingPtr, *txRingPtr; // pointer to RX and TX descriptor buffers
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uint8_t *bufPtr; // pointer to RX and TX buffer area
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uint16_t blockSize; // size of a single buffer
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uint8_t mac[6]; // MAC-address
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ETHHW_State *statePtr; // area where ETHHW state is stored, MUST immediately precede rxRingPtr!
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} ETHHW_InitOpts;
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typedef struct {
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uint32_t DES0, DES1, DES2, DES3; // descriptor DWORDS
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} ETHHW_Desc;
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// descriptor extension
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// SIZE OF THIS MUST BE DIVISIBLE BY 4!!!
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typedef struct {
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uint32_t bufAddr; // buffer address to restore
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uint16_t txCntr; // transmit counter
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uint16_t pad0;
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uint32_t tsCbPtr; // pointer to timestamp callback function
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uint32_t tsCbArg; // user-defined timestamp parameter
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} ETHHW_DescExt;
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// full descriptor (DMA descriptor + extension)
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// SIZE OF THIS MUST BE DIVISIBLE BY 4!!!
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typedef struct {
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ETHHW_Desc desc; // descriptor
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ETHHW_DescExt ext; // extension
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} ETHHW_DescFull;
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typedef enum {
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ETHHW_EVT_RX_NOTFY,
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ETHHW_EVT_RX_READ,
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ETHHW_EVT_TX_DONE
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} ETHHW_EventType; // TODO shouldn't start with zero
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typedef struct {
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uint8_t type; // event type
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union {
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struct {
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uint16_t size; // packet size
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void *payload; // pointer to received data
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uint32_t ts_s; // timestamp seconds
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uint32_t ts_ns; // timestamp nanoseconds
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} rx;
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struct {
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uint32_t tag; // some arbitrary tag
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uint32_t ts_s; // timestamp seconds
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uint32_t ts_ns; // timestamp nanoseconds
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} tx;
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} data;
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} ETHHW_EventDesc;
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#define ETHHW_RET_RX_PROCESSED (1)
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typedef enum {
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ETHHW_TXOPT_NONE = 0b00,
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ETHHW_TXOPT_INTERRUPT_ON_COMPLETION = 0b01,
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ETHHW_TXOPT_CAPTURE_TS = 0b11
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} ETHHW_TxOpt;
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typedef struct {
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uint32_t txTsCbPtr; // pointer to callback function invoked on transmission completion
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uint32_t tag; // arbitrary tagging
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} ETHHW_OptArg_TxTsCap;
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void ETHHW_Init(ETH_TypeDef *eth, ETHHW_InitOpts *init);
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void ETHHW_Start(ETH_TypeDef *eth);
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void ETHHW_Transmit(ETH_TypeDef *eth, const uint8_t *buf, uint16_t len, uint8_t txOpts, void *txOptArgs);
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void ETHHW_ProcessRx(ETH_TypeDef *eth);
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void ETHHW_SetLinkProperties(ETH_TypeDef *eth, bool fastEthernet, bool fullDuplex);
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void ETHHW_ISR(ETH_TypeDef *eth);
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uint32_t ETHHW_ReadPHYRegister(ETH_TypeDef *eth, uint32_t PHYAddr, uint32_t PHYReg, uint32_t *pRegValue);
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uint32_t ETHHW_WritePHYRegister(ETH_TypeDef *eth, uint32_t PHYAddr, uint32_t PHYReg, uint32_t RegValue);
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/* ---- PTP CAPABILITIES ---- */
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typedef enum {
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ETHHW_PTP_PPS_OFF = 0,
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ETHHW_PTP_PPS_1Hz = 1,
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ETHHW_PTP_PPS_2Hz,
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ETHHW_PTP_PPS_4Hz,
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ETHHW_PTP_PPS_8Hz,
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ETHHW_PTP_PPS_16Hz,
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ETHHW_PTP_PPS_32Hz,
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ETHHW_PTP_PPS_64Hz,
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ETHHW_PTP_PPS_128Hz,
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ETHHW_PTP_PPS_256Hz,
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ETHHW_PTP_PPS_512Hz,
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ETHHW_PTP_PPS_1024Hz,
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ETHHW_PTP_PPS_2048Hz,
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ETHHW_PTP_PPS_4096Hz,
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ETHHW_PTP_PPS_8192Hz,
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ETHHW_PTP_PPS_16384Hz
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} ETHHW_PPS_FreqEnum;
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void ETHHW_EnablePTPTimeStamping(ETH_TypeDef *eth); // Enable PTP timestamping (currently every frame received gets timestamped)
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void ETHHW_DisablePTPTimeStamping(ETH_TypeDef *eth); // Disable PTP timestamping
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void ETHHW_InitPTPTime(ETH_TypeDef *eth, uint32_t sec, uint32_t nsec); // Initialize PTP clock time
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void ETHHW_EnablePTPFineCorr(ETH_TypeDef *eth, bool enFineCorr); // Enable fine correction method
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void ETHHW_UpdatePTPTime(ETH_TypeDef *eth, uint32_t sec, uint32_t nsec, bool add_substract); // Update PTP time forward or backward by a given value
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uint32_t ETHHW_GetPTPAddend(ETH_TypeDef *eth); // Get PTP addend
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void ETHHW_SetPTPAddend(ETH_TypeDef *eth, uint32_t addend); // Set PTP addend
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void ETHHW_SetPTPPPSFreq(ETH_TypeDef *eth, uint32_t freqCode); // Set PPS output frequency
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uint32_t ETHHW_GetPTPSubsecondIncrement(ETH_TypeDef *eth); // Get PTP clock subsecond increment
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void ETHHW_SetPTPSubsecondIncrement(ETH_TypeDef *eth, uint8_t increment); // Set PTP clock subsecond increment. Time quantum is 0.467 ns.
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void ETHHW_AuxTimestampCh(ETH_TypeDef *eth, uint8_t ch, bool en); // Enable auxiliary timestamping channel
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void ETHHW_ReadLastAuxTimestamp(ETH_TypeDef *eth, uint32_t *ps, uint32_t *pns); // Read lastly captured auxiliary timestamp
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void ETHHW_ClearAuxTimestampFIFO(ETH_TypeDef *eth); // Clear auxiliary timestamp FIFO
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uint8_t ETHHW_GetAuxTimestampCnt(ETH_TypeDef *eth); // Get number of available auxiliary snapshots
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void ETHHW_StartPTPPPSPulseTrain(ETH_TypeDef *eth, uint32_t high_len, uint32_t period); // Generate PPS signal using the pulse train feature
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void ETHHW_StopPTPPPSPulseTrain(ETH_TypeDef *eth); // Stop generating a pulse train
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#endif /* ETH_MAC_DRV_H_ */
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