- PHY configuration constants corrected, startup delay added
- CMake custom target name option added
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e257ca3f39
commit
dad59f4b3e
35
usb_driver.c
35
usb_driver.c
@ -43,7 +43,7 @@ static const char *FIFO_STATUS_STR[6] = {
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// ---------------
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#if defined(STM32H745xx) || defined(STM32H743xx)
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#define USB_GPIO_AF (GPIO_AF10_OTG1_FS)
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#define USB_GPIO_AF (GPIO_AF10_OTG2_FS)
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#elif defined(STM32F407xx)
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#define USB_GPIO_AF (GPIO_AF10_OTG_FS)
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#endif
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@ -56,11 +56,16 @@ void usbdrv_gpio_init() {
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GPIO_InitTypeDef gpio_init;
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gpio_init.Mode = GPIO_MODE_AF_PP;
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gpio_init.Pin = GPIO_PIN_11 | GPIO_PIN_12;
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gpio_init.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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gpio_init.Pull = GPIO_NOPULL;
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gpio_init.Alternate = USB_GPIO_AF;
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/* Pin initializations cannot be OR-ed together! */
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gpio_init.Pin = GPIO_PIN_11;
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HAL_GPIO_Init(GPIOA, &gpio_init); // USB D-
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gpio_init.Pin = GPIO_PIN_12;
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HAL_GPIO_Init(GPIOA, &gpio_init); // USB D+
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// HAL_GPIO_WritePin(GPIOA, GPIO_PIN_11, GPIO_PIN_SET);
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@ -127,20 +132,33 @@ void usbdrv_init_global_state() {
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#endif
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}
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#if defined(STM32H745xx) || defined(STM32H743xx)
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#define TOCAL_VALUE (0x00)
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#define TRDT_VALUE (0x05)
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#elif defined(STM32F407xx)
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#define TOCAL_VALUE (0x07)
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#define TRDT_VALUE (0x06)
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#endif
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// ---------------
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#define USB_LINESPEED_FULL_SPEED (0b11)
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// initialize USB peripheral
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void usbdrv_periph_init() {
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#if defined(STM32H745xx) || defined(STM32H743xx)
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HAL_PWREx_EnableUSBVoltageDetector();
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WAIT_FOR_nBIT(PWR->CR3, PWR_CR3_USB33RDY);
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#endif
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__HAL_RCC_USB_OTG_FS_CLK_ENABLE(); // enable clock on USB peripheral
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HAL_Delay(1000);
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//__HAL_RCC_USB_OTG_FS_ULPI_CLK_ENABLE();
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//__HAL_RCC_USB_OTG_FS_FORCE_RESET();
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//__HAL_RCC_USB_OTG_FS_RELEASE_RESET();
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// HAL_PWREx_EnableUSBReg();
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// HAL_PWREx_EnableUSBVoltageDetector();
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#if defined(STM32H745xx) || defined(STM32H743xx)
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SET_BIT(USBG->GUSBCFG, USB_OTG_GUSBCFG_PHYSEL); // select the internal FS PHY
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@ -152,17 +170,18 @@ void usbdrv_periph_init() {
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CLEAR_BIT(USBG->GAHBCFG, USB_OTG_GAHBCFG_GINT); // mask all interrupts for now
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CLEAR_BIT(USBG->GUSBCFG, USB_OTG_GUSBCFG_HNPCAP | USB_OTG_GUSBCFG_SRPCAP); // disable HNP and SRP
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WRITE_FIELD(USBG->GUSBCFG, USB_OTG_GUSBCFG_TRDT, 0x06); // set TRDT according to the RM
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WRITE_FIELD(USBG->GUSBCFG, USB_OTG_GUSBCFG_TOCAL, 0x07); // set TOCAL
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WRITE_FIELD(USBG->GUSBCFG, USB_OTG_GUSBCFG_TRDT, TRDT_VALUE); // set TRDT according to the RM
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WRITE_FIELD(USBG->GUSBCFG, USB_OTG_GUSBCFG_TOCAL, TOCAL_VALUE); // set TOCAL
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SET_BIT(USBG->GUSBCFG, USB_OTG_GUSBCFG_FDMOD); // force Device mode
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#if defined(STM32H745xx) || defined(STM32H743xx)
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CLEAR_BIT(USBG->GCCFG, USB_OTG_GCCFG_VBDEN); // turn off VBUSSENSE
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CLEAR_BIT(USBG->GCCFG, USB_OTG_GCCFG_VBDEN); // turn on VBUSSENSE
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SET_BIT(USBG->GOTGCTL, USB_OTG_GOTGCTL_BVALOEN | USB_OTG_GOTGCTL_BVALOVAL); // force B-session
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#elif defined(STM32F407xx)
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SET_BIT(USBG->GCCFG, USB_OTG_GCCFG_NOVBUSSENS); // turn off VBUSSENSE
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#endif
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// HAL_Delay(50); // it takes time to forcing Device mode takes effect
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SET_BIT(USBD->DCTL, USB_OTG_DCTL_SDIS); // soft disconnect peripheral (should be upper, but since it's controlled by a Device register, cannot be set before switching to device mode)
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